diff options
author | Juergen Ributzka <juergen@apple.com> | 2013-12-14 06:53:06 +0000 |
---|---|---|
committer | Juergen Ributzka <juergen@apple.com> | 2013-12-14 06:53:06 +0000 |
commit | aaecc0fc0898be1bdd0f5e6f67230cae559f61b8 (patch) | |
tree | cf0d1f3e2dfe34a15ac348cf9a77a61bec741efe /include/llvm/CodeGen/StackMaps.h | |
parent | cdeccb0c224f8c5863ef769c582b2f7c3cbb043c (diff) | |
download | llvm-aaecc0fc0898be1bdd0f5e6f67230cae559f61b8.tar.gz llvm-aaecc0fc0898be1bdd0f5e6f67230cae559f61b8.tar.bz2 llvm-aaecc0fc0898be1bdd0f5e6f67230cae559f61b8.tar.xz |
[Stackmap] Liveness Analysis Pass
This optional register liveness analysis pass can be enabled with either
-enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass
traverses each basic block in a machine function. For each basic block the
instructions are processed in reversed order and if a patchpoint or stackmap
instruction is encountered the current live-out register set is encoded as a
register mask and attached to the instruction.
Later on during stackmap generation the live-out register mask is processed and
also emitted as part of the stackmap.
This information is optional and intended for optimization purposes only. This
will enable a client of the stackmap to reason about the registers it can use
and which registers need to be preserved.
Reviewed by Andy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197317 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/StackMaps.h')
-rw-r--r-- | include/llvm/CodeGen/StackMaps.h | 32 |
1 files changed, 29 insertions, 3 deletions
diff --git a/include/llvm/CodeGen/StackMaps.h b/include/llvm/CodeGen/StackMaps.h index c61ba59eeb..40de34fdc6 100644 --- a/include/llvm/CodeGen/StackMaps.h +++ b/include/llvm/CodeGen/StackMaps.h @@ -93,6 +93,22 @@ public: : LocType(LocType), Size(Size), Reg(Reg), Offset(Offset) {} }; + struct LiveOutReg { + unsigned short Reg; + unsigned short RegNo; + unsigned short Size; + + LiveOutReg() : Reg(0), RegNo(0), Size(0) {} + LiveOutReg(unsigned short Reg, unsigned short RegNo, unsigned short Size) + : Reg(Reg), RegNo(RegNo), Size(Size) {} + + void MarkInvalid() { Reg = 0; } + + // Only sort by the dwarf register number. + bool operator< (const LiveOutReg &LO) const { return RegNo < LO.RegNo; } + static bool IsInvalid(const LiveOutReg &LO) { return LO.Reg == 0; } + }; + // OpTypes are used to encode information about the following logical // operand (which may consist of several MachineOperands) for the // OpParser. @@ -115,15 +131,18 @@ public: private: typedef SmallVector<Location, 8> LocationVec; + typedef SmallVector<LiveOutReg, 8> LiveOutVec; struct CallsiteInfo { const MCExpr *CSOffsetExpr; uint64_t ID; LocationVec Locations; + LiveOutVec LiveOuts; CallsiteInfo() : CSOffsetExpr(0), ID(0) {} CallsiteInfo(const MCExpr *CSOffsetExpr, uint64_t ID, - LocationVec Locations) - : CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(Locations) {} + LocationVec &Locations, LiveOutVec &LiveOuts) + : CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(Locations), + LiveOuts(LiveOuts) {} }; typedef std::vector<CallsiteInfo> CallsiteInfoList; @@ -154,8 +173,15 @@ private: std::pair<Location, MachineInstr::const_mop_iterator> parseOperand(MachineInstr::const_mop_iterator MOI, - MachineInstr::const_mop_iterator MOE); + MachineInstr::const_mop_iterator MOE) const; + + /// \brief Create a live-out register record for the given register @p Reg. + LiveOutReg createLiveOutReg(unsigned Reg, const MCRegisterInfo &MCRI, + const TargetRegisterInfo *TRI) const; + /// \brief Parse the register live-out mask and return a vector of live-out + /// registers that need to be recorded in the stackmap. + LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const; /// This should be called by the MC lowering code _immediately_ before /// lowering the MI to an MCInst. It records where the operands for the |