Rename ISD::MemOpAddrMode to ISD::MemIndexedMode

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 14 insertions, 13 deletions

diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h
index 2448a65ee6..2622098416 100644
--- a/include/llvm/CodeGen/SelectionDAG.h
+++ b/include/llvm/CodeGen/SelectionDAG.h
@@ -316,7 +316,7 @@ public:
                        SDOperand Chain, SDOperand Ptr, const Value *SV,
                        int SVOffset, MVT::ValueType EVT, bool isVolatile=false);
   SDOperand getIndexedLoad(SDOperand OrigLoad, SDOperand Base,
-                           SDOperand Offset, ISD::MemOpAddrMode AM);
+                           SDOperand Offset, ISD::MemIndexedMode AM);
   SDOperand getVecLoad(unsigned Count, MVT::ValueType VT, SDOperand Chain, 
                        SDOperand Ptr, SDOperand SV);
 
@@ -328,7 +328,7 @@ public:
                           const Value *SV, int SVOffset, MVT::ValueType TVT,
                           bool isVolatile=false);
   SDOperand getIndexedStore(SDOperand OrigStoe, SDOperand Base,
-                           SDOperand Offset, ISD::MemOpAddrMode AM);
+                           SDOperand Offset, ISD::MemIndexedMode AM);
 
   // getSrcValue - construct a node to track a Value* through the backend
   SDOperand getSrcValue(const Value* I, int offset = 0);
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index 1ed4dc43c5..ef27bc19bd 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -524,8 +524,8 @@ namespace ISD {
   bool isBuildVectorAllZeros(const SDNode *N);
   
   //===--------------------------------------------------------------------===//
-  /// MemOpAddrMode enum - This enum defines the three load / store addressing
-  /// modes.
+  /// MemIndexedMode enum - This enum defines the load / store indexed 
+  /// addressing modes.
   ///
   /// UNINDEXED    "Normal" load / store. The effective address is already
   ///              computed and is available in the base pointer. The offset
@@ -552,12 +552,13 @@ namespace ISD {
   ///              computation); a post-indexed store produces one value (the
   ///              the result of the base +/- offset computation).
   ///
-  enum MemOpAddrMode {
+  enum MemIndexedMode {
     UNINDEXED = 0,
     PRE_INC,
     PRE_DEC,
     POST_INC,
-    POST_DEC
+    POST_DEC,
+    LAST_INDEXED_MODE
   };
 
   //===--------------------------------------------------------------------===//
@@ -865,7 +866,7 @@ public:
   /// getOperationName - Return the opcode of this operation for printing.
   ///
   const char* getOperationName(const SelectionDAG *G = 0) const;
-  static const char* getAddressingModeName(ISD::MemOpAddrMode AM);
+  static const char* getIndexedModeName(ISD::MemIndexedMode AM);
   void dump() const;
   void dump(const SelectionDAG *G) const;
 
@@ -1383,7 +1384,7 @@ public:
 ///
 class LoadSDNode : public SDNode {
   // AddrMode - unindexed, pre-indexed, post-indexed.
-  ISD::MemOpAddrMode AddrMode;
+  ISD::MemIndexedMode AddrMode;
 
   // ExtType - non-ext, anyext, sext, zext.
   ISD::LoadExtType ExtType;
@@ -1405,7 +1406,7 @@ class LoadSDNode : public SDNode {
 protected:
   friend class SelectionDAG;
   LoadSDNode(SDOperand Chain, SDOperand Ptr, SDOperand Off,
-             ISD::MemOpAddrMode AM, ISD::LoadExtType ETy, MVT::ValueType LVT,
+             ISD::MemIndexedMode AM, ISD::LoadExtType ETy, MVT::ValueType LVT,
              const Value *SV, int O=0, unsigned Align=1, bool Vol=false)
     : SDNode(ISD::LOAD, Chain, Ptr, Off),
       AddrMode(AM), ExtType(ETy), LoadedVT(LVT), SrcValue(SV), SVOffset(O),
@@ -1418,7 +1419,7 @@ public:
   const SDOperand getChain() const { return getOperand(0); }
   const SDOperand getBasePtr() const { return getOperand(1); }
   const SDOperand getOffset() const { return getOperand(2); }
-  ISD::MemOpAddrMode getAddressingMode() const { return AddrMode; }
+  ISD::MemIndexedMode getAddressingMode() const { return AddrMode; }
   ISD::LoadExtType getExtensionType() const { return ExtType; }
   MVT::ValueType getLoadedVT() const { return LoadedVT; }
   const Value *getSrcValue() const { return SrcValue; }
@@ -1436,7 +1437,7 @@ public:
 ///
 class StoreSDNode : public SDNode {
   // AddrMode - unindexed, pre-indexed, post-indexed.
-  ISD::MemOpAddrMode AddrMode;
+  ISD::MemIndexedMode AddrMode;
 
   // IsTruncStore - True is the op does a truncation before store.
   bool IsTruncStore;
@@ -1458,7 +1459,7 @@ class StoreSDNode : public SDNode {
 protected:
   friend class SelectionDAG;
   StoreSDNode(SDOperand Chain, SDOperand Value, SDOperand Ptr, SDOperand Off,
-              ISD::MemOpAddrMode AM, bool isTrunc, MVT::ValueType SVT,
+              ISD::MemIndexedMode AM, bool isTrunc, MVT::ValueType SVT,
               const Value *SV, int O=0, unsigned Align=0, bool Vol=false)
     : SDNode(ISD::STORE, Chain, Value, Ptr, Off),
       AddrMode(AM), IsTruncStore(isTrunc), StoredVT(SVT), SrcValue(SV),
@@ -1472,7 +1473,7 @@ public:
   const SDOperand getValue() const { return getOperand(1); }
   const SDOperand getBasePtr() const { return getOperand(2); }
   const SDOperand getOffset() const { return getOperand(3); }
-  ISD::MemOpAddrMode getAddressingMode() const { return AddrMode; }
+  ISD::MemIndexedMode getAddressingMode() const { return AddrMode; }
   bool isTruncatingStore() const { return IsTruncStore; }
   MVT::ValueType getStoredVT() const { return StoredVT; }
   const Value *getSrcValue() const { return SrcValue; }