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author | Sylvestre Ledru <sylvestre@debian.org> | 2012-09-27 09:59:43 +0000 |
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committer | Sylvestre Ledru <sylvestre@debian.org> | 2012-09-27 09:59:43 +0000 |
commit | 7e2c793a2b5c746344652b6579e958ee42fafdcc (patch) | |
tree | 1a18d61db4c838b535c569333230d704fccf0a75 /include/llvm/CodeGen | |
parent | 466e0f38d344fd1a64b7be2b3c4e3f7003ef4fef (diff) | |
download | llvm-7e2c793a2b5c746344652b6579e958ee42fafdcc.tar.gz llvm-7e2c793a2b5c746344652b6579e958ee42fafdcc.tar.bz2 llvm-7e2c793a2b5c746344652b6579e958ee42fafdcc.tar.xz |
Fix a typo 'iff' => 'if'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164767 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r-- | include/llvm/CodeGen/FunctionLoweringInfo.h | 2 | ||||
-rw-r--r-- | include/llvm/CodeGen/ISDOpcodes.h | 2 | ||||
-rw-r--r-- | include/llvm/CodeGen/MachineBranchProbabilityInfo.h | 4 | ||||
-rw-r--r-- | include/llvm/CodeGen/SelectionDAG.h | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/include/llvm/CodeGen/FunctionLoweringInfo.h b/include/llvm/CodeGen/FunctionLoweringInfo.h index 8cf22eca4f..794a95a03b 100644 --- a/include/llvm/CodeGen/FunctionLoweringInfo.h +++ b/include/llvm/CodeGen/FunctionLoweringInfo.h @@ -58,7 +58,7 @@ public: MachineFunction *MF; MachineRegisterInfo *RegInfo; BranchProbabilityInfo *BPI; - /// CanLowerReturn - true iff the function's return value can be lowered to + /// CanLowerReturn - true if the function's return value can be lowered to /// registers. bool CanLowerReturn; diff --git a/include/llvm/CodeGen/ISDOpcodes.h b/include/llvm/CodeGen/ISDOpcodes.h index 5d0a3b4c70..ddf1b7d17d 100644 --- a/include/llvm/CodeGen/ISDOpcodes.h +++ b/include/llvm/CodeGen/ISDOpcodes.h @@ -340,7 +340,7 @@ namespace ISD { /// condition code in op #4, a CondCodeSDNode. SELECT_CC, - /// SetCC operator - This evaluates to a true value iff the condition is + /// SetCC operator - This evaluates to a true value if the condition is /// true. If the result value type is not i1 then the high bits conform /// to getBooleanContents. The operands to this are the left and right /// operands to compare (ops #0, and #1) and the condition code to compare diff --git a/include/llvm/CodeGen/MachineBranchProbabilityInfo.h b/include/llvm/CodeGen/MachineBranchProbabilityInfo.h index 12189ceb7f..87f595adfa 100644 --- a/include/llvm/CodeGen/MachineBranchProbabilityInfo.h +++ b/include/llvm/CodeGen/MachineBranchProbabilityInfo.h @@ -69,7 +69,7 @@ public: // Return a probability as a fraction between 0 (0% probability) and // 1 (100% probability), however the value is never equal to 0, and can be 1 - // only iff SRC block has only one successor. + // only if SRC block has only one successor. // NB: This routine's complexity is linear on the number of successors of // Src. Querying sequentially for each successor's probability is a quadratic // query pattern. @@ -77,7 +77,7 @@ public: MachineBasicBlock *Dst) const; // Print value between 0 (0% probability) and 1 (100% probability), - // however the value is never equal to 0, and can be 1 only iff SRC block + // however the value is never equal to 0, and can be 1 only if SRC block // has only one successor. raw_ostream &printEdgeProbability(raw_ostream &OS, MachineBasicBlock *Src, MachineBasicBlock *Dst) const; diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h index 619ee69943..a8f5f5fa09 100644 --- a/include/llvm/CodeGen/SelectionDAG.h +++ b/include/llvm/CodeGen/SelectionDAG.h @@ -1021,7 +1021,7 @@ public: /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an /// ISD::OR with a ConstantSDNode that is guaranteed to have the same /// semantics as an ADD. This handles the equivalence: - /// X|Cst == X+Cst iff X&Cst = 0. + /// X|Cst == X+Cst if X&Cst = 0. bool isBaseWithConstantOffset(SDValue Op) const; /// isKnownNeverNan - Test whether the given SDValue is known to never be NaN. |