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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-24 12:04:44 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-24 12:04:44 +0000 |
| commit | 38a10ff063971c2f7f7384cceba3253bca32e27a (patch) | |
| tree | b33b11ee7611a9aac0ec323faa06dd700e6233fe /include/llvm/IR/IntrinsicsMips.td | |
| parent | d4bf7a3853dab12c11cbfc8088fd76f548a8d017 (diff) | |
| download | llvm-38a10ff063971c2f7f7384cceba3253bca32e27a.tar.gz llvm-38a10ff063971c2f7f7384cceba3253bca32e27a.tar.bz2 llvm-38a10ff063971c2f7f7384cceba3253bca32e27a.tar.xz | |
[mips][msa] Added support for matching bsel and bseli from normal IR (i.e. not intrinsics)
This required correcting the definition of the bsel and bseli intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191290 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/IR/IntrinsicsMips.td')
| -rw-r--r-- | include/llvm/IR/IntrinsicsMips.td | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/include/llvm/IR/IntrinsicsMips.td b/include/llvm/IR/IntrinsicsMips.td index 055a8cf9d2..abca235681 100644 --- a/include/llvm/IR/IntrinsicsMips.td +++ b/include/llvm/IR/IntrinsicsMips.td @@ -644,16 +644,12 @@ def int_mips_bnz_v : GCCBuiltin<"__builtin_msa_bnz_v">, Intrinsic<[llvm_i32_ty], [llvm_v16i8_ty], [IntrNoMem]>; def int_mips_bsel_v : GCCBuiltin<"__builtin_msa_bsel_v">, - Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>; + Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty], + [IntrNoMem]>; def int_mips_bseli_b : GCCBuiltin<"__builtin_msa_bseli_b">, - Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i32_ty], [IntrNoMem]>; -def int_mips_bseli_h : GCCBuiltin<"__builtin_msa_bseli_h">, - Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_i32_ty], [IntrNoMem]>; -def int_mips_bseli_w : GCCBuiltin<"__builtin_msa_bseli_w">, - Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_i32_ty], [IntrNoMem]>; -def int_mips_bseli_d : GCCBuiltin<"__builtin_msa_bseli_d">, - Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_i32_ty], [IntrNoMem]>; + Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty], + [IntrNoMem]>; def int_mips_bset_b : GCCBuiltin<"__builtin_msa_bset_b">, Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>; |