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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-23 18:28:28 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-23 18:28:28 +0000 |
| commit | ed143b7c0cca568a7dc35e91d2e37207f79b8d76 (patch) | |
| tree | 04012227cf8222bd32367926f86520c2277c7496 /include/llvm/IR/IntrinsicsR600.td | |
| parent | d88f5b71c79ae77a41218ad3e9c5491caa2c766f (diff) | |
| download | llvm-ed143b7c0cca568a7dc35e91d2e37207f79b8d76.tar.gz llvm-ed143b7c0cca568a7dc35e91d2e37207f79b8d76.tar.bz2 llvm-ed143b7c0cca568a7dc35e91d2e37207f79b8d76.tar.xz | |
R600/SI: Fix div_scale intrinsic.
The operand that must match one of the others does matter,
and implement selecting for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211523 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/IR/IntrinsicsR600.td')
| -rw-r--r-- | include/llvm/IR/IntrinsicsR600.td | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/include/llvm/IR/IntrinsicsR600.td b/include/llvm/IR/IntrinsicsR600.td index 89b3ef3636..2566cc2561 100644 --- a/include/llvm/IR/IntrinsicsR600.td +++ b/include/llvm/IR/IntrinsicsR600.td @@ -38,8 +38,13 @@ defm int_r600_read_tidig : R600ReadPreloadRegisterIntrinsic_xyz < let TargetPrefix = "AMDGPU" in { def int_AMDGPU_div_scale : GCCBuiltin<"__builtin_amdgpu_div_scale">, + // 1st parameter: Numerator + // 2nd parameter: Denominator + // 3rd parameter: Constant to select select between first and + // second. (0 = first, 1 = second). Intrinsic<[llvm_anyfloat_ty, llvm_i1_ty], - [LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>; + [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i1_ty], + [IntrNoMem]>; def int_AMDGPU_div_fmas : GCCBuiltin<"__builtin_amdgpu_div_fmas">, Intrinsic<[llvm_anyfloat_ty], |