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author | Chris Lattner <sabre@nondot.org> | 2010-03-23 23:46:07 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-03-23 23:46:07 +0000 |
commit | ae8f4c4f86f3c1dc58955dfb2a15ff27a7e56bd9 (patch) | |
tree | d29379b19a6972f2be6e48f8f04f82ce91f25542 /include/llvm/IntrinsicsX86.td | |
parent | c75c5fa12582956fc6b7d7d756b2bdd49fa61f71 (diff) | |
download | llvm-ae8f4c4f86f3c1dc58955dfb2a15ff27a7e56bd9.tar.gz llvm-ae8f4c4f86f3c1dc58955dfb2a15ff27a7e56bd9.tar.bz2 llvm-ae8f4c4f86f3c1dc58955dfb2a15ff27a7e56bd9.tar.xz |
[llvm_void_ty] is no longer needed for result types,
just use an empty result list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99346 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/IntrinsicsX86.td')
-rw-r--r-- | include/llvm/IntrinsicsX86.td | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/include/llvm/IntrinsicsX86.td b/include/llvm/IntrinsicsX86.td index 67abd955a1..95c764d4a6 100644 --- a/include/llvm/IntrinsicsX86.td +++ b/include/llvm/IntrinsicsX86.td @@ -142,25 +142,25 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // SIMD store ops let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">, - Intrinsic<[llvm_void_ty], [llvm_ptr_ty, + Intrinsic<[], [llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>; } // Cacheability support ops let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">, - Intrinsic<[llvm_void_ty], [llvm_ptr_ty, + Intrinsic<[], [llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>; def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">, - Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>; + Intrinsic<[], [], [IntrWriteMem]>; } // Control register. let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse_stmxcsr : - Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>; + Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; def int_x86_sse_ldmxcsr : - Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>; + Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; } // Misc. @@ -458,26 +458,26 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // SIMD store ops let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">, - Intrinsic<[llvm_void_ty], [llvm_ptr_ty, + Intrinsic<[], [llvm_ptr_ty, llvm_v2f64_ty], [IntrWriteMem]>; def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">, - Intrinsic<[llvm_void_ty], [llvm_ptr_ty, + Intrinsic<[], [llvm_ptr_ty, llvm_v16i8_ty], [IntrWriteMem]>; def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">, - Intrinsic<[llvm_void_ty], [llvm_ptr_ty, + Intrinsic<[], [llvm_ptr_ty, llvm_v4i32_ty], [IntrWriteMem]>; } // Cacheability support ops let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">, - Intrinsic<[llvm_void_ty], [llvm_ptr_ty, + Intrinsic<[], [llvm_ptr_ty, llvm_v2i64_ty], [IntrWriteMem]>; def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">, - Intrinsic<[llvm_void_ty], [llvm_ptr_ty, + Intrinsic<[], [llvm_ptr_ty, llvm_v2f64_ty], [IntrWriteMem]>; def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">, - Intrinsic<[llvm_void_ty], [llvm_ptr_ty, + Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>; } @@ -497,14 +497,14 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">, Intrinsic<[llvm_i32_ty], [llvm_v16i8_ty], [IntrNoMem]>; def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">, - Intrinsic<[llvm_void_ty], [llvm_v16i8_ty, + Intrinsic<[], [llvm_v16i8_ty, llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>; def int_x86_sse2_clflush : GCCBuiltin<"__builtin_ia32_clflush">, - Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>; + Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>; def int_x86_sse2_lfence : GCCBuiltin<"__builtin_ia32_lfence">, - Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>; + Intrinsic<[], [], [IntrWriteMem]>; def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">, - Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>; + Intrinsic<[], [], [IntrWriteMem]>; } //===----------------------------------------------------------------------===// @@ -545,10 +545,10 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // Thread synchronization ops. let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">, - Intrinsic<[llvm_void_ty], [llvm_ptr_ty, + Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>; def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">, - Intrinsic<[llvm_void_ty], [llvm_i32_ty, + Intrinsic<[], [llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>; } @@ -973,9 +973,9 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // Empty MMX state op. let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_mmx_emms : GCCBuiltin<"__builtin_ia32_emms">, - Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>; + Intrinsic<[], [], [IntrWriteMem]>; def int_x86_mmx_femms : GCCBuiltin<"__builtin_ia32_femms">, - Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>; + Intrinsic<[], [], [IntrWriteMem]>; } // Integer arithmetic ops. @@ -1151,7 +1151,7 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // Misc. let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_mmx_maskmovq : GCCBuiltin<"__builtin_ia32_maskmovq">, - Intrinsic<[llvm_void_ty], + Intrinsic<[], [llvm_v8i8_ty, llvm_v8i8_ty, llvm_ptr_ty], [IntrWriteMem]>; @@ -1159,6 +1159,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". Intrinsic<[llvm_i32_ty], [llvm_v8i8_ty], [IntrNoMem]>; def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">, - Intrinsic<[llvm_void_ty], [llvm_ptr_ty, + Intrinsic<[], [llvm_ptr_ty, llvm_v1i64_ty], [IntrWriteMem]>; } |