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authorOwen Anderson <resistor@mac.com>2012-01-19 19:24:37 +0000
committerOwen Anderson <resistor@mac.com>2012-01-19 19:24:37 +0000
commit7b672fe03b6f1734ac545e3aceb6d90bed3f0406 (patch)
tree1cded99eefc813e2dea7f1be139c19fba4b529c5 /include/llvm/MC/MCInst.h
parent0cdece438972f4c670973d99d2c7743ab822de1a (diff)
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Add a new form of MCOperand, for representing sub-instructions. This is intended for supporting bundles through the MC layer, rather than lowering them pre-MC as we currently do for Thumb2 IT blocks. Since these sub-instruction operands hold pointers to the sub-instructions, it is the responsibility of the target's AsmPrinter to provide storage for them for the duration of the EmitInstruction() call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148492 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/MC/MCInst.h')
-rw-r--r--include/llvm/MC/MCInst.h21
1 files changed, 20 insertions, 1 deletions
diff --git a/include/llvm/MC/MCInst.h b/include/llvm/MC/MCInst.h
index a5e4632b2e..a2ade57fa5 100644
--- a/include/llvm/MC/MCInst.h
+++ b/include/llvm/MC/MCInst.h
@@ -25,6 +25,7 @@ class raw_ostream;
class MCAsmInfo;
class MCInstPrinter;
class MCExpr;
+class MCInst;
/// MCOperand - Instances of this class represent operands of the MCInst class.
/// This is a simple discriminated union.
@@ -34,7 +35,8 @@ class MCOperand {
kRegister, ///< Register operand.
kImmediate, ///< Immediate operand.
kFPImmediate, ///< Floating-point immediate operand.
- kExpr ///< Relocatable immediate operand.
+ kExpr, ///< Relocatable immediate operand.
+ kInst ///< Sub-instruction operand.
};
unsigned char Kind;
@@ -43,6 +45,7 @@ class MCOperand {
int64_t ImmVal;
double FPImmVal;
const MCExpr *ExprVal;
+ const MCInst *InstVal;
};
public:
@@ -53,6 +56,7 @@ public:
bool isImm() const { return Kind == kImmediate; }
bool isFPImm() const { return Kind == kFPImmediate; }
bool isExpr() const { return Kind == kExpr; }
+ bool isInst() const { return Kind == kInst; }
/// getReg - Returns the register number.
unsigned getReg() const {
@@ -94,6 +98,15 @@ public:
ExprVal = Val;
}
+ const MCInst *getInst() const {
+ assert(isInst() && "This is not a sub-instruction");
+ return InstVal;
+ }
+ void setInst(const MCInst *Val) {
+ assert(isInst() && "This is not a sub-instruction");
+ InstVal = Val;
+ }
+
static MCOperand CreateReg(unsigned Reg) {
MCOperand Op;
Op.Kind = kRegister;
@@ -118,6 +131,12 @@ public:
Op.ExprVal = Val;
return Op;
}
+ static MCOperand CreateInst(const MCInst *Val) {
+ MCOperand Op;
+ Op.Kind = kInst;
+ Op.InstVal = Val;
+ return Op;
+ }
void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
void dump() const;