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| author | Jim Grosbach <grosbach@apple.com> | 2012-04-20 16:29:46 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2012-04-20 16:29:46 +0000 |
| commit | 2efd8acb3cc6ceb0ca32610389a53909896f99e5 (patch) | |
| tree | 1276672550299658972af2715b6c6e272c0393fa /include/llvm/Target/Target.td | |
| parent | 93282d243067f20f197cf9978c2570bba3b96984 (diff) | |
| download | llvm-2efd8acb3cc6ceb0ca32610389a53909896f99e5.tar.gz llvm-2efd8acb3cc6ceb0ca32610389a53909896f99e5.tar.bz2 llvm-2efd8acb3cc6ceb0ca32610389a53909896f99e5.tar.xz | |
Add documentation comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155203 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/Target/Target.td')
| -rw-r--r-- | include/llvm/Target/Target.td | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td index 6a321ea2cf..e3f4c6465d 100644 --- a/include/llvm/Target/Target.td +++ b/include/llvm/Target/Target.td @@ -402,6 +402,11 @@ class Instruction { string AsmMatchConverter = ""; + /// TwoOperandAliasConstraint - Enable TableGen to auto-generate a + /// two-operand matcher inst-alias for a three operand instruction. + /// For example, the arm instruction "add r3, r3, r5" can be written + /// as "add r3, r5". The constraint is of the same form as a tied-operand + /// constraint. For example, "$Rn = $Rd". string TwoOperandAliasConstraint = ""; ///@} |