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author | Misha Brukman <brukman+llvm@gmail.com> | 2003-05-24 00:08:39 +0000 |
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committer | Misha Brukman <brukman+llvm@gmail.com> | 2003-05-24 00:08:39 +0000 |
commit | 00b05bd703b0d50133aecf4ce9f48e96d14504b3 (patch) | |
tree | ed8f0b751d60dde97782f7d6b873c882661515c0 /include/llvm/Target | |
parent | eefe979c9126695be4a86a86bf52c6a8f4e4427b (diff) | |
download | llvm-00b05bd703b0d50133aecf4ce9f48e96d14504b3.tar.gz llvm-00b05bd703b0d50133aecf4ce9f48e96d14504b3.tar.bz2 llvm-00b05bd703b0d50133aecf4ce9f48e96d14504b3.tar.xz |
NOP instructions are pseudo-instructions. We should not have them explicitly in
our representation, since they are usually special cases of already-existing
instructions.
This abstracts away methods that let a pass create and verify a NOP instruction,
without relying on a `NOP' enum to be in existence in the target's instruction
info descriptor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6319 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/Target')
-rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 4663cfd46b..30843ea287 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -273,6 +273,20 @@ public: return true; // safe but very conservative } + + /// createNOPinstr - returns the target's implementation of NOP, which is + /// usually a pseudo-instruction, implemented by a degenerate version of + /// another instruction, e.g. X86: xchg ax, ax; SparcV9: sethi g0, 0 + /// + virtual MachineInstr* createNOPinstr() const = 0; + + /// isNOPinstr - since we no longer have a special NOP opcode, we need to know + /// if a given instruction is interpreted as an `official' NOP instr, i.e., + /// there may be more than one way to `do nothing' but only one canonical + /// way to slack off. + /// + virtual bool isNOPinstr(const MachineInstr &MI) const = 0; + //------------------------------------------------------------------------- // Code generation support for creating individual machine instructions // |