diff options
author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2013-05-31 17:08:36 +0000 |
---|---|---|
committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2013-05-31 17:08:36 +0000 |
commit | bed23081860275c79137f65d592920e7991b8198 (patch) | |
tree | d06c6135d2f04c21d9551cf53d867de0cc7d4ce5 /include/llvm/Target | |
parent | 9c8e1f93b419299aa9a416ada3b7190ce4a1f1b6 (diff) | |
download | llvm-bed23081860275c79137f65d592920e7991b8198.tar.gz llvm-bed23081860275c79137f65d592920e7991b8198.tar.bz2 llvm-bed23081860275c79137f65d592920e7991b8198.tar.xz |
Add a way to define the bit range covered by a SubRegIndex.
NOTE: If this broke your out-of-tree backend, in *RegisterInfo.td, change
the instances of SubRegIndex that have a comps template arg to use the
ComposedSubRegIndex class instead.
In TableGen land, this adds Size and Offset attributes to SubRegIndex,
and the ComposedSubRegIndex class, for which the Size and Offset are
computed by TableGen. This also adds an accessor in MCRegisterInfo, and
Size/Offsets for the X86 and ARM subreg indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183020 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/Target')
-rw-r--r-- | include/llvm/Target/Target.td | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td index 7de8b384c3..c201f6baab 100644 --- a/include/llvm/Target/Target.td +++ b/include/llvm/Target/Target.td @@ -22,12 +22,19 @@ include "llvm/IR/Intrinsics.td" class RegisterClass; // Forward def // SubRegIndex - Use instances of SubRegIndex to identify subregisters. -class SubRegIndex<list<SubRegIndex> comps = []> { +class SubRegIndex<int size = -1, int offset = 0> { string Namespace = ""; + // Size - Size (in bits) of the sub-registers represented by this index. + int Size = size; + + // Offset - Offset of the first bit that is part of this sub-register index. + int Offset = offset; + // ComposedOf - A list of two SubRegIndex instances, [A, B]. // This indicates that this SubRegIndex is the result of composing A and B. - list<SubRegIndex> ComposedOf = comps; + // See ComposedSubRegIndex. + list<SubRegIndex> ComposedOf = []; // CoveringSubRegIndices - A list of two or more sub-register indexes that // cover this sub-register. @@ -48,6 +55,14 @@ class SubRegIndex<list<SubRegIndex> comps = []> { list<SubRegIndex> CoveringSubRegIndices = []; } +// ComposedSubRegIndex - A sub-register that is the result of composing A and B. +// Offset is set to the sum of A and B's Offsets. Size is set to B's Size. +class ComposedSubRegIndex<SubRegIndex A, SubRegIndex B> + : SubRegIndex<B.Size, -1> { + // See SubRegIndex. + let ComposedOf = [A, B]; +} + // RegAltNameIndex - The alternate name set to use for register operands of // this register class when printing. class RegAltNameIndex { |