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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2013-04-26 16:53:15 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2013-04-26 16:53:15 +0000
commita3acc2b6cf093571812e7e55d936cf188c695e23 (patch)
tree88116b95b814b5f17ecc544edbe94f58cf0523df /include/llvm/Transforms
parent730a570c8c1b84f650ae92bacd61c88cfef9c6a4 (diff)
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PowerPC: Use RegisterOperand instead of RegisterClass operands
In the default PowerPC assembler syntax, registers are specified simply by number, so they cannot be distinguished from immediate values (without looking at the opcode). This means that the default operand matching logic for the asm parser does not work, and we need to specify custom matchers. Since those can only be specified with RegisterOperand classes and not directly on the RegisterClass, all instructions patterns used by the asm parser need to use a RegisterOperand (instead of a RegisterClass) for all their register operands. This patch adds one RegisterOperand for each RegisterClass, using the same name as the class, just in lower case, and updates all instruction patterns to use RegisterOperand instead of RegisterClass operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180611 91177308-0d34-0410-b5e6-96231b3b80d8
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