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| author | Cameron Zwarich <zwarich@apple.com> | 2011-01-17 01:08:59 +0000 |
|---|---|---|
| committer | Cameron Zwarich <zwarich@apple.com> | 2011-01-17 01:08:59 +0000 |
| commit | ebed6de7b10d20721f5bd30ed3730cadefed7963 (patch) | |
| tree | 0f000eba9f826b76a7b83cdb2064a2d8009d9f94 /include/llvm/Transforms | |
| parent | e7a820c208415094723adabd8336d3a036692ea4 (diff) | |
| download | llvm-ebed6de7b10d20721f5bd30ed3730cadefed7963.tar.gz llvm-ebed6de7b10d20721f5bd30ed3730cadefed7963.tar.bz2 llvm-ebed6de7b10d20721f5bd30ed3730cadefed7963.tar.xz | |
Eliminate the use of dominance frontiers in PromoteMemToReg. In addition to
eliminating a potentially quadratic data structure, this also gives a 17%
speedup when running -scalarrepl on test-suite + SPEC2000 + SPEC2006. My initial
experiment gave a greater speedup around 25%, but I moved the dominator tree
level computation from dominator tree construction to PromoteMemToReg.
Since this approach to computing IDFs has a much lower overhead than the old
code using precomputed DFs, it is worth looking at using this new code for the
second scalarrepl pass as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123609 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/Transforms')
| -rw-r--r-- | include/llvm/Transforms/Utils/PromoteMemToReg.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/include/llvm/Transforms/Utils/PromoteMemToReg.h b/include/llvm/Transforms/Utils/PromoteMemToReg.h index 35cfaddb73..98d51a29ad 100644 --- a/include/llvm/Transforms/Utils/PromoteMemToReg.h +++ b/include/llvm/Transforms/Utils/PromoteMemToReg.h @@ -38,8 +38,7 @@ bool isAllocaPromotable(const AllocaInst *AI); /// made to the IR. /// void PromoteMemToReg(const std::vector<AllocaInst*> &Allocas, - DominatorTree &DT, DominanceFrontier &DF, - AliasSetTracker *AST = 0); + DominatorTree &DT, AliasSetTracker *AST = 0); } // End llvm namespace |