Shorten and rearrange data fields to save a word of memory.

Per review feedback.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56388 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 7 insertions, 6 deletions

diff --git a/include/llvm/CodeGen/LiveInterval.h b/include/llvm/CodeGen/LiveInterval.h
index 8b9eb530ad..b346787bd9 100644
--- a/include/llvm/CodeGen/LiveInterval.h
+++ b/include/llvm/CodeGen/LiveInterval.h
@@ -103,19 +103,20 @@ namespace llvm {
 
     unsigned reg;        // the register or stack slot of this interval
                          // if the top bits is set, it represents a stack slot.
-    unsigned preference; // preferred register to allocate for this interval
     float weight;        // weight of this interval
-    bool isEarlyClobber;
-    bool overlapsEarlyClobber;
+    // The next 3 fields pack into a single word (on most hosts).
+    // Logically the first two could be bitfields, but that's slower.
+    bool isEarlyClobber;  // marked earlyclobber in some asm
+    bool overlapsEarlyClobber; // input to asm that has an earlyclobber
+    unsigned short preference; // preferred register for this interval
     Ranges ranges;       // the ranges in which this register is live
     VNInfoList valnos;   // value#'s
 
   public:
     LiveInterval(unsigned Reg, float Weight, bool IsSS = false, 
                  bool IsEarlyClobber = false, bool OverlapsEarlyClobber = false)
-      : reg(Reg), preference(0), weight(Weight), 
-        isEarlyClobber(IsEarlyClobber), 
-        overlapsEarlyClobber(OverlapsEarlyClobber) {
+      : reg(Reg), weight(Weight), isEarlyClobber(IsEarlyClobber), 
+        overlapsEarlyClobber(OverlapsEarlyClobber), preference(0)  {
       if (IsSS)
         reg = reg | (1U << (sizeof(unsigned)*8-1));
     }