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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-23 18:28:23 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-23 18:28:23 +0000 |
| commit | d88f5b71c79ae77a41218ad3e9c5491caa2c766f (patch) | |
| tree | fed77424d34d8773367d3eb82a251803909e006a /include/llvm | |
| parent | dd15ed8a83cb99b10895bf9dc20a7db1c7fe4232 (diff) | |
| download | llvm-d88f5b71c79ae77a41218ad3e9c5491caa2c766f.tar.gz llvm-d88f5b71c79ae77a41218ad3e9c5491caa2c766f.tar.bz2 llvm-d88f5b71c79ae77a41218ad3e9c5491caa2c766f.tar.xz | |
R600: Fix formatting of intrinsic definitions.
It makes more sense for the GCCBuiltin name to come immediately
after the ID name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211522 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm')
| -rw-r--r-- | include/llvm/IR/IntrinsicsR600.td | 36 |
1 files changed, 14 insertions, 22 deletions
diff --git a/include/llvm/IR/IntrinsicsR600.td b/include/llvm/IR/IntrinsicsR600.td index 09607d5834..89b3ef3636 100644 --- a/include/llvm/IR/IntrinsicsR600.td +++ b/include/llvm/IR/IntrinsicsR600.td @@ -37,36 +37,28 @@ defm int_r600_read_tidig : R600ReadPreloadRegisterIntrinsic_xyz < } // End TargetPrefix = "r600" let TargetPrefix = "AMDGPU" in { -def int_AMDGPU_div_scale : +def int_AMDGPU_div_scale : GCCBuiltin<"__builtin_amdgpu_div_scale">, Intrinsic<[llvm_anyfloat_ty, llvm_i1_ty], - [LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>, - GCCBuiltin<"__builtin_amdgpu_div_scale">; + [LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>; -def int_AMDGPU_div_fmas : +def int_AMDGPU_div_fmas : GCCBuiltin<"__builtin_amdgpu_div_fmas">, Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], - [IntrNoMem]>, - GCCBuiltin<"__builtin_amdgpu_div_fmas">; + [IntrNoMem]>; -def int_AMDGPU_div_fixup : +def int_AMDGPU_div_fixup : GCCBuiltin<"__builtin_amdgpu_div_fixup">, Intrinsic<[llvm_anyfloat_ty], - [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>, - GCCBuiltin<"__builtin_amdgpu_div_fixup">; + [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], + [IntrNoMem]>; -def int_AMDGPU_trig_preop : - Intrinsic<[llvm_anyfloat_ty], - [LLVMMatchType<0>, llvm_i32_ty], [IntrNoMem]>, - GCCBuiltin<"__builtin_amdgpu_trig_preop">; +def int_AMDGPU_trig_preop : GCCBuiltin<"__builtin_amdgpu_trig_preop">, + Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, llvm_i32_ty], + [IntrNoMem]>; -def int_AMDGPU_rcp : - Intrinsic<[llvm_anyfloat_ty], - [LLVMMatchType<0>], [IntrNoMem]>, - GCCBuiltin<"__builtin_amdgpu_rcp">; - -def int_AMDGPU_rsq : - Intrinsic<[llvm_anyfloat_ty], - [LLVMMatchType<0>], [IntrNoMem]>, - GCCBuiltin<"__builtin_amdgpu_rsq">; +def int_AMDGPU_rcp : GCCBuiltin<"__builtin_amdgpu_rcp">, + Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>; +def int_AMDGPU_rsq : GCCBuiltin<"__builtin_amdgpu_rsq">, + Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>; } // End TargetPrefix = "AMDGPU" |