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authorOwen Anderson <resistor@mac.com>2010-12-09 20:27:52 +0000
committerOwen Anderson <resistor@mac.com>2010-12-09 20:27:52 +0000
commit05018c2f2872a05b1a2fff1a9934621ba1f38084 (patch)
treed50bd3b2f96ee8493415aaaa65483807f5bd3013 /include
parentb492a7c2134d3886f545f1b5ea55115d71529a10 (diff)
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Fix an issue in some Thumb fixups, where the effective PC address needs to be 4-byte aligned when calculating
the offset. Add a new fixup flag to represent this, and use it for the one fixups that I have a testcase for needing this. It's quite likely that the other Thumb fixups will need this too, and to have their fixup encoding logic adjusted accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121408 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/MC/MCCodeEmitter.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/include/llvm/MC/MCCodeEmitter.h b/include/llvm/MC/MCCodeEmitter.h
index eac06ede2a..2588661b62 100644
--- a/include/llvm/MC/MCCodeEmitter.h
+++ b/include/llvm/MC/MCCodeEmitter.h
@@ -25,7 +25,10 @@ struct MCFixupKindInfo {
enum FixupKindFlags {
/// Is this fixup kind PCrelative? This is used by the assembler backend to
/// evaluate fixup values in a target independent manner when possible.
- FKF_IsPCRel = (1 << 0)
+ FKF_IsPCRel = (1 << 0),
+
+ // Should this fixup kind force a 4-byte aligned effective PC value?
+ FKF_IsAligned = (1 << 1)
};
/// A target specific name for the fixup kind. The names will be unique for