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authorNadav Rotem <nrotem@apple.com>2012-10-24 23:47:38 +0000
committerNadav Rotem <nrotem@apple.com>2012-10-24 23:47:38 +0000
commit2652c50f74bc4a874c6a2e4b34ff2d52d479183f (patch)
tree82c8466e0c684e466cb5dec7360704269ed0f9b6 /include
parentd95666c226e41218a07541aaa2cc1fba823c25e4 (diff)
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Implement a basic cost model for vector and scalar instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166642 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/Target/TargetLowering.h2
-rw-r--r--include/llvm/Target/TargetTransformImpl.h5
2 files changed, 7 insertions, 0 deletions
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index 0dbdd25140..19eb941635 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -1958,6 +1958,7 @@ private:
ValueTypeActionImpl ValueTypeActions;
+public:
LegalizeKind
getTypeConversion(LLVMContext &Context, EVT VT) const {
// If this is a simple type, use the ComputeRegisterProp mechanism.
@@ -2074,6 +2075,7 @@ private:
return LegalizeKind(TypeSplitVector, NVT);
}
+private:
std::vector<std::pair<EVT, const TargetRegisterClass*> > AvailableRegClasses;
/// TargetDAGCombineArray - Targets can specify ISD nodes that they would
diff --git a/include/llvm/Target/TargetTransformImpl.h b/include/llvm/Target/TargetTransformImpl.h
index ec39f9968e..25a7edeb01 100644
--- a/include/llvm/Target/TargetTransformImpl.h
+++ b/include/llvm/Target/TargetTransformImpl.h
@@ -16,6 +16,7 @@
#define LLVM_TARGET_TARGET_TRANSFORMATION_IMPL_H
#include "llvm/TargetTransformInfo.h"
+#include "llvm/CodeGen/ValueTypes.h"
namespace llvm {
@@ -51,6 +52,10 @@ class VectorTargetTransformImpl : public VectorTargetTransformInfo {
private:
const TargetLowering *TLI;
+ /// Estimate the cost of type-legalization and the legalized type.
+ std::pair<unsigned, EVT>
+ getTypeLegalizationCost(LLVMContext &C, EVT Ty) const;
+
public:
explicit VectorTargetTransformImpl(const TargetLowering *TL) : TLI(TL) {}