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authorDaniel Dunbar <daniel@zuster.org>2010-05-20 20:20:32 +0000
committerDaniel Dunbar <daniel@zuster.org>2010-05-20 20:20:32 +0000
commit4072886a690a853c57c79a87a6423a7bfe0ce61f (patch)
treec984ece9fc7295769df2fa262ef47ec77c31feb3 /include
parentc6519f916b5922de81c53547fd21364994195a70 (diff)
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tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor
it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104270 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/Target/Target.td3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td
index cc19e0de8e..ee9e83f5d1 100644
--- a/include/llvm/Target/Target.td
+++ b/include/llvm/Target/Target.td
@@ -221,6 +221,9 @@ class Instruction {
// purposes.
bit isCodeGenOnly = 0;
+ // Is this instruction a pseudo instruction for use by the assembler parser.
+ bit isAsmParserOnly = 0;
+
InstrItinClass Itinerary = NoItinerary;// Execution steps used for scheduling.
string Constraints = ""; // OperandConstraint, e.g. $src = $dst.