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| author | Craig Topper <craig.topper@gmail.com> | 2014-04-14 00:51:57 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2014-04-14 00:51:57 +0000 |
| commit | 4ba844388c586ee40871a52dc9d6eab883fde1b7 (patch) | |
| tree | e58f9eb46c2ea69c44c2b06a9cae04291ce5ae68 /include | |
| parent | b9ed50cf1772205b5a8f3ce2b604d01f9335e360 (diff) | |
| download | llvm-4ba844388c586ee40871a52dc9d6eab883fde1b7.tar.gz llvm-4ba844388c586ee40871a52dc9d6eab883fde1b7.tar.bz2 llvm-4ba844388c586ee40871a52dc9d6eab883fde1b7.tar.xz | |
[C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206142 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
76 files changed, 522 insertions, 472 deletions
diff --git a/include/llvm/ADT/BitVector.h b/include/llvm/ADT/BitVector.h index b53182021e..da2b3ad7e7 100644 --- a/include/llvm/ADT/BitVector.h +++ b/include/llvm/ADT/BitVector.h @@ -72,7 +72,7 @@ public: /// BitVector default ctor - Creates an empty bitvector. BitVector() : Size(0), Capacity(0) { - Bits = 0; + Bits = nullptr; } /// BitVector ctor - Creates a bitvector of specified number of bits. All @@ -88,7 +88,7 @@ public: /// BitVector copy ctor. BitVector(const BitVector &RHS) : Size(RHS.size()) { if (Size == 0) { - Bits = 0; + Bits = nullptr; Capacity = 0; return; } @@ -100,7 +100,7 @@ public: BitVector(BitVector &&RHS) : Bits(RHS.Bits), Size(RHS.Size), Capacity(RHS.Capacity) { - RHS.Bits = 0; + RHS.Bits = nullptr; } ~BitVector() { @@ -467,7 +467,7 @@ public: Size = RHS.Size; Capacity = RHS.Capacity; - RHS.Bits = 0; + RHS.Bits = nullptr; return *this; } diff --git a/include/llvm/ADT/IntervalMap.h b/include/llvm/ADT/IntervalMap.h index 1ca3288a35..46549eed99 100644 --- a/include/llvm/ADT/IntervalMap.h +++ b/include/llvm/ADT/IntervalMap.h @@ -1177,7 +1177,7 @@ branchRoot(unsigned Position) { if (Nodes == 1) size[0] = rootSize; else - NewOffset = distribute(Nodes, rootSize, Leaf::Capacity, NULL, size, + NewOffset = distribute(Nodes, rootSize, Leaf::Capacity, nullptr, size, Position, true); // Allocate new nodes. @@ -1218,7 +1218,7 @@ splitRoot(unsigned Position) { if (Nodes == 1) Size[0] = rootSize; else - NewOffset = distribute(Nodes, rootSize, Leaf::Capacity, NULL, Size, + NewOffset = distribute(Nodes, rootSize, Leaf::Capacity, nullptr, Size, Position, true); // Allocate new nodes. @@ -1346,7 +1346,7 @@ protected: public: /// const_iterator - Create an iterator that isn't pointing anywhere. - const_iterator() : map(0) {} + const_iterator() : map(nullptr) {} /// setMap - Change the map iterated over. This call must be followed by a /// call to goToBegin(), goToEnd(), or find() diff --git a/include/llvm/ADT/OwningPtr.h b/include/llvm/ADT/OwningPtr.h index 034bcfd6ed..240079dca4 100644 --- a/include/llvm/ADT/OwningPtr.h +++ b/include/llvm/ADT/OwningPtr.h @@ -146,7 +146,7 @@ public: T *get() const { return Ptr; } LLVM_EXPLICIT operator bool() const { return Ptr != 0; } - bool operator!() const { return Ptr == 0; } + bool operator!() const { return Ptr == nullptr; } void swap(OwningArrayPtr &RHS) { T *Tmp = RHS.Ptr; diff --git a/include/llvm/ADT/PostOrderIterator.h b/include/llvm/ADT/PostOrderIterator.h index 59fa3f39c9..dd8cc74b71 100644 --- a/include/llvm/ADT/PostOrderIterator.h +++ b/include/llvm/ADT/PostOrderIterator.h @@ -111,7 +111,7 @@ class po_iterator : public std::iterator<std::forward_iterator_tag, } inline po_iterator(NodeType *BB) { - this->insertEdge((NodeType*)0, BB); + this->insertEdge((NodeType*)nullptr, BB); VisitStack.push_back(std::make_pair(BB, GT::child_begin(BB))); traverseChild(); } @@ -119,7 +119,7 @@ class po_iterator : public std::iterator<std::forward_iterator_tag, inline po_iterator(NodeType *BB, SetType &S) : po_iterator_storage<SetType, ExtStorage>(S) { - if (this->insertEdge((NodeType*)0, BB)) { + if (this->insertEdge((NodeType*)nullptr, BB)) { VisitStack.push_back(std::make_pair(BB, GT::child_begin(BB))); traverseChild(); } diff --git a/include/llvm/ADT/ScopedHashTable.h b/include/llvm/ADT/ScopedHashTable.h index efddd9f9b8..ae16c9c137 100644 --- a/include/llvm/ADT/ScopedHashTable.h +++ b/include/llvm/ADT/ScopedHashTable.h @@ -159,10 +159,10 @@ private: void operator=(const ScopedHashTable&); // NOT YET IMPLEMENTED friend class ScopedHashTableScope<K, V, KInfo, AllocatorTy>; public: - ScopedHashTable() : CurScope(0) {} + ScopedHashTable() : CurScope(nullptr) {} ScopedHashTable(AllocatorTy A) : CurScope(0), Allocator(A) {} ~ScopedHashTable() { - assert(CurScope == 0 && TopLevelMap.empty() && "Scope imbalance!"); + assert(!CurScope && TopLevelMap.empty() && "Scope imbalance!"); } @@ -222,7 +222,7 @@ ScopedHashTableScope<K, V, KInfo, Allocator>:: ScopedHashTableScope(ScopedHashTable<K, V, KInfo, Allocator> &ht) : HT(ht) { PrevScope = HT.CurScope; HT.CurScope = this; - LastValInScope = 0; + LastValInScope = nullptr; } template <typename K, typename V, typename KInfo, typename Allocator> @@ -233,7 +233,7 @@ ScopedHashTableScope<K, V, KInfo, Allocator>::~ScopedHashTableScope() { // Pop and delete all values corresponding to this scope. while (ScopedHashTableVal<K, V> *ThisEntry = LastValInScope) { // Pop this value out of the TopLevelMap. - if (ThisEntry->getNextForKey() == 0) { + if (!ThisEntry->getNextForKey()) { assert(HT.TopLevelMap[ThisEntry->getKey()] == ThisEntry && "Scope imbalance!"); HT.TopLevelMap.erase(ThisEntry->getKey()); diff --git a/include/llvm/ADT/SparseMultiSet.h b/include/llvm/ADT/SparseMultiSet.h index 797a898dcc..d2b2f8d9b6 100644 --- a/include/llvm/ADT/SparseMultiSet.h +++ b/include/llvm/ADT/SparseMultiSet.h @@ -187,7 +187,7 @@ public: typedef const ValueT *const_pointer; SparseMultiSet() - : Sparse(0), Universe(0), FreelistIdx(SMSNode::INVALID), NumFree(0) { } + : Sparse(nullptr), Universe(0), FreelistIdx(SMSNode::INVALID), NumFree(0) {} ~SparseMultiSet() { free(Sparse); } diff --git a/include/llvm/ADT/SparseSet.h b/include/llvm/ADT/SparseSet.h index b46ccc9375..899f2e4da0 100644 --- a/include/llvm/ADT/SparseSet.h +++ b/include/llvm/ADT/SparseSet.h @@ -142,7 +142,7 @@ public: typedef ValueT *pointer; typedef const ValueT *const_pointer; - SparseSet() : Sparse(0), Universe(0) {} + SparseSet() : Sparse(nullptr), Universe(0) {} ~SparseSet() { free(Sparse); } /// setUniverse - Set the universe size which determines the largest key the diff --git a/include/llvm/ADT/TinyPtrVector.h b/include/llvm/ADT/TinyPtrVector.h index 1df8d661b4..5e0a119b46 100644 --- a/include/llvm/ADT/TinyPtrVector.h +++ b/include/llvm/ADT/TinyPtrVector.h @@ -69,7 +69,7 @@ public: } TinyPtrVector(TinyPtrVector &&RHS) : Val(RHS.Val) { - RHS.Val = (EltTy)0; + RHS.Val = (EltTy)nullptr; } TinyPtrVector &operator=(TinyPtrVector &&RHS) { if (this == &RHS) @@ -92,7 +92,7 @@ public: } Val = RHS.Val; - RHS.Val = (EltTy)0; + RHS.Val = nullptr; return *this; } @@ -174,7 +174,7 @@ public: } void push_back(EltTy NewVal) { - assert(NewVal != 0 && "Can't add a null value"); + assert(NewVal && "Can't add a null value"); // If we have nothing, add something. if (Val.isNull()) { @@ -195,7 +195,7 @@ public: void pop_back() { // If we have a single value, convert to empty. if (Val.template is<EltTy>()) - Val = (EltTy)0; + Val = nullptr; else if (VecTy *Vec = Val.template get<VecTy*>()) Vec->pop_back(); } @@ -203,7 +203,7 @@ public: void clear() { // If we have a single value, convert to empty. if (Val.template is<EltTy>()) { - Val = (EltTy)0; + Val = (EltTy)nullptr; } else if (VecTy *Vec = Val.template dyn_cast<VecTy*>()) { // If we have a vector form, just clear it. Vec->clear(); @@ -218,7 +218,7 @@ public: // If we have a single value, convert to empty. if (Val.template is<EltTy>()) { if (I == begin()) - Val = (EltTy)0; + Val = nullptr; } else if (VecTy *Vec = Val.template dyn_cast<VecTy*>()) { // multiple items in a vector; just do the erase, there is no // benefit to collapsing back to a pointer @@ -234,7 +234,7 @@ public: if (Val.template is<EltTy>()) { if (S == begin() && S != E) - Val = (EltTy)0; + Val = nullptr; } else if (VecTy *Vec = Val.template dyn_cast<VecTy*>()) { return Vec->erase(S, E); } diff --git a/include/llvm/Analysis/AliasAnalysis.h b/include/llvm/Analysis/AliasAnalysis.h index a06a5622ed..885286604c 100644 --- a/include/llvm/Analysis/AliasAnalysis.h +++ b/include/llvm/Analysis/AliasAnalysis.h @@ -75,7 +75,7 @@ protected: public: static char ID; // Class identification, replacement for typeinfo - AliasAnalysis() : DL(0), TLI(0), AA(0) {} + AliasAnalysis() : DL(nullptr), TLI(nullptr), AA(nullptr) {} virtual ~AliasAnalysis(); // We want to be subclassed /// UnknownSize - This is a special value which can be used with the @@ -116,8 +116,8 @@ public: /// the location, or null if there is no known unique tag. const MDNode *TBAATag; - explicit Location(const Value *P = 0, uint64_t S = UnknownSize, - const MDNode *N = 0) + explicit Location(const Value *P = nullptr, uint64_t S = UnknownSize, + const MDNode *N = nullptr) : Ptr(P), Size(S), TBAATag(N) {} Location getWithNewPtr(const Value *NewPtr) const { @@ -134,7 +134,7 @@ public: Location getWithoutTBAATag() const { Location Copy(*this); - Copy.TBAATag = 0; + Copy.TBAATag = nullptr; return Copy; } }; @@ -560,12 +560,12 @@ struct DenseMapInfo<AliasAnalysis::Location> { static inline AliasAnalysis::Location getEmptyKey() { return AliasAnalysis::Location(DenseMapInfo<const Value *>::getEmptyKey(), - 0, 0); + 0, nullptr); } static inline AliasAnalysis::Location getTombstoneKey() { return AliasAnalysis::Location(DenseMapInfo<const Value *>::getTombstoneKey(), - 0, 0); + 0, nullptr); } static unsigned getHashValue(const AliasAnalysis::Location &Val) { return DenseMapInfo<const Value *>::getHashValue(Val.Ptr) ^ diff --git a/include/llvm/Analysis/BlockFrequencyInfoImpl.h b/include/llvm/Analysis/BlockFrequencyInfoImpl.h index ea5da18ed0..f891afdf55 100644 --- a/include/llvm/Analysis/BlockFrequencyInfoImpl.h +++ b/include/llvm/Analysis/BlockFrequencyInfoImpl.h @@ -157,13 +157,13 @@ class BlockFrequencyInfoImpl { PE = GraphTraits< Inverse<BlockT *> >::child_end(BB); if (PI == PE) - return 0; + return nullptr; BlockT *Pred = *PI; ++PI; if (PI != PE) - return 0; + return nullptr; return Pred; } @@ -313,7 +313,7 @@ class BlockFrequencyInfoImpl { // Travel over all blocks in postorder. for (pot_iterator I = pot_begin(), E = pot_end(); I != E; ++I) { BlockT *BB = *I; - BlockT *LastTail = 0; + BlockT *LastTail = nullptr; DEBUG(dbgs() << "POT: " << getBlockName(BB) << "\n"); for (typename GT::ChildIteratorType diff --git a/include/llvm/Analysis/ConstantFolding.h b/include/llvm/Analysis/ConstantFolding.h index 0018a56796..09d45ca2b4 100644 --- a/include/llvm/Analysis/ConstantFolding.h +++ b/include/llvm/Analysis/ConstantFolding.h @@ -36,15 +36,16 @@ namespace llvm { /// Note that this fails if not all of the operands are constant. Otherwise, /// this function can only fail when attempting to fold instructions like loads /// and stores, which have no constant expression form. -Constant *ConstantFoldInstruction(Instruction *I, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0); +Constant *ConstantFoldInstruction(Instruction *I, + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr); /// ConstantFoldConstantExpression - Attempt to fold the constant expression /// using the specified DataLayout. If successful, the constant result is /// result is returned, if not, null is returned. Constant *ConstantFoldConstantExpression(const ConstantExpr *CE, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI =nullptr); /// ConstantFoldInstOperands - Attempt to constant fold an instruction with the /// specified operands. If successful, the constant result is returned, if not, @@ -54,8 +55,8 @@ Constant *ConstantFoldConstantExpression(const ConstantExpr *CE, /// Constant *ConstantFoldInstOperands(unsigned Opcode, Type *DestTy, ArrayRef<Constant *> Ops, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr); /// ConstantFoldCompareInstOperands - Attempt to constant fold a compare /// instruction (icmp/fcmp) with the specified operands. If it fails, it @@ -63,8 +64,8 @@ Constant *ConstantFoldInstOperands(unsigned Opcode, Type *DestTy, /// Constant *ConstantFoldCompareInstOperands(unsigned Predicate, Constant *LHS, Constant *RHS, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI=nullptr); /// ConstantFoldInsertValueInstruction - Attempt to constant fold an insertvalue /// instruction with the specified operands and indices. The constant result is @@ -75,7 +76,8 @@ Constant *ConstantFoldInsertValueInstruction(Constant *Agg, Constant *Val, /// ConstantFoldLoadFromConstPtr - Return the value that a load from C would /// produce if it is constant and determinable. If this is not determinable, /// return null. -Constant *ConstantFoldLoadFromConstPtr(Constant *C, const DataLayout *TD = 0); +Constant *ConstantFoldLoadFromConstPtr(Constant *C, + const DataLayout *TD = nullptr); /// ConstantFoldLoadThroughGEPConstantExpr - Given a constant and a /// getelementptr constantexpr, return the constant value being addressed by the @@ -96,7 +98,7 @@ bool canConstantFoldCallTo(const Function *F); /// ConstantFoldCall - Attempt to constant fold a call to the specified function /// with the specified arguments, returning null if unsuccessful. Constant *ConstantFoldCall(Function *F, ArrayRef<Constant *> Operands, - const TargetLibraryInfo *TLI = 0); + const TargetLibraryInfo *TLI = nullptr); } #endif diff --git a/include/llvm/Analysis/InstructionSimplify.h b/include/llvm/Analysis/InstructionSimplify.h index 775d0df46c..2367c0bf77 100644 --- a/include/llvm/Analysis/InstructionSimplify.h +++ b/include/llvm/Analysis/InstructionSimplify.h @@ -48,160 +48,166 @@ namespace llvm { /// SimplifyAddInst - Given operands for an Add, see if we can /// fold the result. If not, this returns null. Value *SimplifyAddInst(Value *LHS, Value *RHS, bool isNSW, bool isNUW, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifySubInst - Given operands for a Sub, see if we can /// fold the result. If not, this returns null. Value *SimplifySubInst(Value *LHS, Value *RHS, bool isNSW, bool isNUW, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// Given operands for an FAdd, see if we can fold the result. If not, this /// returns null. Value *SimplifyFAddInst(Value *LHS, Value *RHS, FastMathFlags FMF, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// Given operands for an FSub, see if we can fold the result. If not, this /// returns null. Value *SimplifyFSubInst(Value *LHS, Value *RHS, FastMathFlags FMF, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// Given operands for an FMul, see if we can fold the result. If not, this /// returns null. Value *SimplifyFMulInst(Value *LHS, Value *RHS, FastMathFlags FMF, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyMulInst - Given operands for a Mul, see if we can /// fold the result. If not, this returns null. - Value *SimplifyMulInst(Value *LHS, Value *RHS, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifyMulInst(Value *LHS, Value *RHS, const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifySDivInst - Given operands for an SDiv, see if we can /// fold the result. If not, this returns null. - Value *SimplifySDivInst(Value *LHS, Value *RHS, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifySDivInst(Value *LHS, Value *RHS, + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyUDivInst - Given operands for a UDiv, see if we can /// fold the result. If not, this returns null. - Value *SimplifyUDivInst(Value *LHS, Value *RHS, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifyUDivInst(Value *LHS, Value *RHS, + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyFDivInst - Given operands for an FDiv, see if we can /// fold the result. If not, this returns null. - Value *SimplifyFDivInst(Value *LHS, Value *RHS, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifyFDivInst(Value *LHS, Value *RHS, + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifySRemInst - Given operands for an SRem, see if we can /// fold the result. If not, this returns null. - Value *SimplifySRemInst(Value *LHS, Value *RHS, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifySRemInst(Value *LHS, Value *RHS, + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyURemInst - Given operands for a URem, see if we can /// fold the result. If not, this returns null. - Value *SimplifyURemInst(Value *LHS, Value *RHS, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifyURemInst(Value *LHS, Value *RHS, + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyFRemInst - Given operands for an FRem, see if we can /// fold the result. If not, this returns null. - Value *SimplifyFRemInst(Value *LHS, Value *RHS, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifyFRemInst(Value *LHS, Value *RHS, + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyShlInst - Given operands for a Shl, see if we can /// fold the result. If not, this returns null. Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyLShrInst - Given operands for a LShr, see if we can /// fold the result. If not, this returns null. Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyAShrInst - Given operands for a AShr, see if we can /// fold the result. If not, this returns null. Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyAndInst - Given operands for an And, see if we can /// fold the result. If not, this returns null. - Value *SimplifyAndInst(Value *LHS, Value *RHS, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifyAndInst(Value *LHS, Value *RHS, const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyOrInst - Given operands for an Or, see if we can /// fold the result. If not, this returns null. - Value *SimplifyOrInst(Value *LHS, Value *RHS, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifyOrInst(Value *LHS, Value *RHS, const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyXorInst - Given operands for a Xor, see if we can /// fold the result. If not, this returns null. - Value *SimplifyXorInst(Value *LHS, Value *RHS, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifyXorInst(Value *LHS, Value *RHS, const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyICmpInst - Given operands for an ICmpInst, see if we can /// fold the result. If not, this returns null. Value *SimplifyICmpInst(unsigned Predicate, Value *LHS, Value *RHS, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyFCmpInst - Given operands for an FCmpInst, see if we can /// fold the result. If not, this returns null. Value *SimplifyFCmpInst(unsigned Predicate, Value *LHS, Value *RHS, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifySelectInst - Given operands for a SelectInst, see if we can fold /// the result. If not, this returns null. Value *SimplifySelectInst(Value *Cond, Value *TrueVal, Value *FalseVal, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyGEPInst - Given operands for an GetElementPtrInst, see if we can /// fold the result. If not, this returns null. - Value *SimplifyGEPInst(ArrayRef<Value *> Ops, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifyGEPInst(ArrayRef<Value *> Ops, const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyInsertValueInst - Given operands for an InsertValueInst, see if we /// can fold the result. If not, this returns null. Value *SimplifyInsertValueInst(Value *Agg, Value *Val, ArrayRef<unsigned> Idxs, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyTruncInst - Given operands for an TruncInst, see if we can fold /// the result. If not, this returns null. - Value *SimplifyTruncInst(Value *Op, Type *Ty, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifyTruncInst(Value *Op, Type *Ty, const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); //=== Helper functions for higher up the class hierarchy. @@ -209,40 +215,40 @@ namespace llvm { /// SimplifyCmpInst - Given operands for a CmpInst, see if we can /// fold the result. If not, this returns null. Value *SimplifyCmpInst(unsigned Predicate, Value *LHS, Value *RHS, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyBinOp - Given operands for a BinaryOperator, see if we can /// fold the result. If not, this returns null. Value *SimplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// \brief Given a function and iterators over arguments, see if we can fold /// the result. /// /// If this call could not be simplified returns null. Value *SimplifyCall(Value *V, User::op_iterator ArgBegin, - User::op_iterator ArgEnd, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + User::op_iterator ArgEnd, const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// \brief Given a function and set of arguments, see if we can fold the /// result. /// /// If this call could not be simplified returns null. Value *SimplifyCall(Value *V, ArrayRef<Value *> Args, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// SimplifyInstruction - See if we can compute a simplified version of this /// instruction. If not, this returns null. - Value *SimplifyInstruction(Instruction *I, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + Value *SimplifyInstruction(Instruction *I, const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// \brief Replace all uses of 'I' with 'SimpleV' and simplify the uses @@ -254,9 +260,9 @@ namespace llvm { /// /// The function returns true if any simplifications were performed. bool replaceAndRecursivelySimplify(Instruction *I, Value *SimpleV, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); /// \brief Recursively attempt to simplify an instruction. /// @@ -265,9 +271,9 @@ namespace llvm { /// of the users impacted. It returns true if any simplifications were /// performed. bool recursivelySimplifyInstruction(Instruction *I, - const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0, - const DominatorTree *DT = 0); + const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr, + const DominatorTree *DT = nullptr); } // end namespace llvm #endif diff --git a/include/llvm/Analysis/LoopInfo.h b/include/llvm/Analysis/LoopInfo.h index aeeea3cea4..045d4dc565 100644 --- a/include/llvm/Analysis/LoopInfo.h +++ b/include/llvm/Analysis/LoopInfo.h @@ -79,7 +79,7 @@ class LoopBase { operator=(const LoopBase<BlockT, LoopT> &) LLVM_DELETED_FUNCTION; public: /// Loop ctor - This creates an empty loop. - LoopBase() : ParentLoop(0) {} + LoopBase() : ParentLoop(nullptr) {} ~LoopBase() { for (size_t i = 0, e = SubLoops.size(); i != e; ++i) delete SubLoops[i]; @@ -106,7 +106,7 @@ public: /// bool contains(const LoopT *L) const { if (L == this) return true; - if (L == 0) return false; + if (!L) return false; return contains(L->getParentLoop()); } @@ -265,7 +265,7 @@ public: /// updates the loop depth of the new child. /// void addChildLoop(LoopT *NewChild) { - assert(NewChild->ParentLoop == 0 && "NewChild already has a parent!"); + assert(!NewChild->ParentLoop && "NewChild already has a parent!"); NewChild->ParentLoop = static_cast<LoopT *>(this); SubLoops.push_back(NewChild); } @@ -278,7 +278,7 @@ public: LoopT *Child = *I; assert(Child->ParentLoop == this && "Child is not a child of this loop!"); SubLoops.erase(SubLoops.begin()+(I-begin())); - Child->ParentLoop = 0; + Child->ParentLoop = nullptr; return Child; } @@ -333,7 +333,7 @@ public: protected: friend class LoopInfoBase<BlockT, LoopT>; - explicit LoopBase(BlockT *BB) : ParentLoop(0) { + explicit LoopBase(BlockT *BB) : ParentLoop(nullptr) { Blocks.push_back(BB); DenseBlockSet.insert(BB); } @@ -372,7 +372,7 @@ public: /// If null, the terminator of the loop preheader is used. /// bool makeLoopInvariant(Value *V, bool &Changed, - Instruction *InsertPt = 0) const; + Instruction *InsertPt = nullptr) const; /// makeLoopInvariant - If the given instruction is inside of the /// loop and it can be hoisted, do so to make it trivially loop-invariant. @@ -384,7 +384,7 @@ public: /// If null, the terminator of the loop preheader is used. /// bool makeLoopInvariant(Instruction *I, bool &Changed, - Instruction *InsertPt = 0) const; + Instruction *InsertPt = nullptr) const; /// getCanonicalInductionVariable - Check to see if the loop has a canonical /// induction variable: an integer recurrence that starts at 0 and increments @@ -531,7 +531,7 @@ public: LoopT *removeLoop(iterator I) { assert(I != end() && "Cannot remove end iterator!"); LoopT *L = *I; - assert(L->getParentLoop() == 0 && "Not a top-level loop!"); + assert(!L->getParentLoop() && "Not a top-level loop!"); TopLevelLoops.erase(TopLevelLoops.begin() + (I-begin())); return L; } @@ -555,14 +555,14 @@ public: std::find(TopLevelLoops.begin(), TopLevelLoops.end(), OldLoop); assert(I != TopLevelLoops.end() && "Old loop not at top level!"); *I = NewLoop; - assert(NewLoop->ParentLoop == 0 && OldLoop->ParentLoop == 0 && + assert(!NewLoop->ParentLoop && !OldLoop->ParentLoop && "Loops already embedded into a subloop!"); } /// addTopLevelLoop - This adds the specified loop to the collection of /// top-level loops. void addTopLevelLoop(LoopT *New) { - assert(New->getParentLoop() == 0 && "Loop already in subloop!"); + assert(!New->getParentLoop() && "Loop already in subloop!"); TopLevelLoops.push_back(New); } @@ -583,7 +583,7 @@ public: static bool isNotAlreadyContainedIn(const LoopT *SubLoop, const LoopT *ParentLoop) { - if (SubLoop == 0) return true; + if (!SubLoop) return true; if (SubLoop == ParentLoop) return false; return isNotAlreadyContainedIn(SubLoop->getParentLoop(), ParentLoop); } @@ -660,7 +660,7 @@ public: void releaseMemory() override { LI.releaseMemory(); } - void print(raw_ostream &O, const Module* M = 0) const override; + void print(raw_ostream &O, const Module* M = nullptr) const override; void getAnalysisUsage(AnalysisUsage &AU) const override; diff --git a/include/llvm/Analysis/LoopInfoImpl.h b/include/llvm/Analysis/LoopInfoImpl.h index 0c0d5c44fb..948be0f5ee 100644 --- a/include/llvm/Analysis/LoopInfoImpl.h +++ b/include/llvm/Analysis/LoopInfoImpl.h @@ -53,7 +53,7 @@ BlockT *LoopBase<BlockT, LoopT>::getExitingBlock() const { getExitingBlocks(ExitingBlocks); if (ExitingBlocks.size() == 1) return ExitingBlocks[0]; - return 0; + return nullptr; } /// getExitBlocks - Return all of the successor blocks of this loop. These @@ -80,7 +80,7 @@ BlockT *LoopBase<BlockT, LoopT>::getExitBlock() const { getExitBlocks(ExitBlocks); if (ExitBlocks.size() == 1) return ExitBlocks[0]; - return 0; + return nullptr; } /// getExitEdges - Return all pairs of (_inside_block_,_outside_block_). @@ -108,14 +108,14 @@ template<class BlockT, class LoopT> BlockT *LoopBase<BlockT, LoopT>::getLoopPreheader() const { // Keep track of nodes outside the loop branching to the header... BlockT *Out = getLoopPredecessor(); - if (!Out) return 0; + if (!Out) return nullptr; // Make sure there is only one exit out of the preheader. typedef GraphTraits<BlockT*> BlockTraits; typename BlockTraits::ChildIteratorType SI = BlockTraits::child_begin(Out); ++SI; if (SI != BlockTraits::child_end(Out)) - return 0; // Multiple exits from the block, must not be a preheader. + return nullptr; // Multiple exits from the block, must not be a preheader. // The predecessor has exactly one successor, so it is a preheader. return Out; @@ -129,7 +129,7 @@ BlockT *LoopBase<BlockT, LoopT>::getLoopPreheader() const { template<class BlockT, class LoopT> BlockT *LoopBase<BlockT, LoopT>::getLoopPredecessor() const { // Keep track of nodes outside the loop branching to the header... - BlockT *Out = 0; + BlockT *Out = nullptr; // Loop over the predecessors of the header node... BlockT *Header = getHeader(); @@ -140,7 +140,7 @@ BlockT *LoopBase<BlockT, LoopT>::getLoopPredecessor() const { typename InvBlockTraits::NodeType *N = *PI; if (!contains(N)) { // If the block is not in the loop... if (Out && Out != N) - return 0; // Multiple predecessors outside the loop + return nullptr; // Multiple predecessors outside the loop Out = N; } } @@ -160,11 +160,11 @@ BlockT *LoopBase<BlockT, LoopT>::getLoopLatch() const { InvBlockTraits::child_begin(Header); typename InvBlockTraits::ChildIteratorType PE = InvBlockTraits::child_end(Header); - BlockT *Latch = 0; + BlockT *Latch = nullptr; for (; PI != PE; ++PI) { typename InvBlockTraits::NodeType *N = *PI; if (contains(N)) { - if (Latch) return 0; + if (Latch) return nullptr; Latch = N; } } @@ -188,7 +188,7 @@ addBasicBlockToLoop(BlockT *NewBB, LoopInfoBase<BlockT, LoopT> &LIB) { assert((Blocks.empty() || LIB[getHeader()] == this) && "Incorrect LI specified for this loop!"); assert(NewBB && "Cannot add a null basic block to the loop!"); - assert(LIB[NewBB] == 0 && "BasicBlock already in the loop!"); + assert(!LIB[NewBB] && "BasicBlock already in the loop!"); LoopT *L = static_cast<LoopT *>(this); @@ -210,12 +210,12 @@ template<class BlockT, class LoopT> void LoopBase<BlockT, LoopT>:: replaceChildLoopWith(LoopT *OldChild, LoopT *NewChild) { assert(OldChild->ParentLoop == this && "This loop is already broken!"); - assert(NewChild->ParentLoop == 0 && "NewChild already has a parent!"); + assert(!NewChild->ParentLoop && "NewChild already has a parent!"); typename std::vector<LoopT *>::iterator I = std::find(SubLoops.begin(), SubLoops.end(), OldChild); assert(I != SubLoops.end() && "OldChild not in loop!"); *I = NewChild; - OldChild->ParentLoop = 0; + OldChild->ParentLoop = nullptr; NewChild->ParentLoop = static_cast<LoopT *>(this); } diff --git a/include/llvm/Analysis/TargetTransformInfo.h b/include/llvm/Analysis/TargetTransformInfo.h index 2ac6ffa333..79fe1dcae6 100644 --- a/include/llvm/Analysis/TargetTransformInfo.h +++ b/include/llvm/Analysis/TargetTransformInfo.h @@ -105,7 +105,7 @@ public: /// The returned cost is defined in terms of \c TargetCostConstants, see its /// comments for a detailed explanation of the cost values. virtual unsigned getOperationCost(unsigned Opcode, Type *Ty, - Type *OpTy = 0) const; + Type *OpTy = nullptr) const; /// \brief Estimate the cost of a GEP operation when lowered. /// @@ -356,7 +356,7 @@ public: /// The index and subtype parameters are used by the subvector insertion and /// extraction shuffle kinds. virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp, int Index = 0, - Type *SubTp = 0) const; + Type *SubTp = nullptr) const; /// \return The expected cost of cast instructions, such as bitcast, trunc, /// zext, etc. @@ -369,7 +369,7 @@ public: /// \returns The expected cost of compare and select instructions. virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, - Type *CondTy = 0) const; + Type *CondTy = nullptr) const; /// \return The expected cost of vector Insert and Extract. /// Use -1 to indicate that there is no information on the index value. diff --git a/include/llvm/CodeGen/Analysis.h b/include/llvm/CodeGen/Analysis.h index 5f2bbd62a0..c3aefd4bcb 100644 --- a/include/llvm/CodeGen/Analysis.h +++ b/include/llvm/CodeGen/Analysis.h @@ -54,7 +54,7 @@ inline unsigned ComputeLinearIndex(Type *Ty, /// void ComputeValueVTs(const TargetLowering &TLI, Type *Ty, SmallVectorImpl<EVT> &ValueVTs, - SmallVectorImpl<uint64_t> *Offsets = 0, + SmallVectorImpl<uint64_t> *Offsets = nullptr, uint64_t StartingOffset = 0); /// ExtractTypeInfo - Returns the type info, possibly bitcast, encoded in V. diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h index d96d81072d..3126fa618c 100644 --- a/include/llvm/CodeGen/AsmPrinter.h +++ b/include/llvm/CodeGen/AsmPrinter.h @@ -247,7 +247,7 @@ namespace llvm { /// an explicit alignment requested, it will override the alignment request /// if required for correctness. /// - void EmitAlignment(unsigned NumBits, const GlobalValue *GV = 0) const; + void EmitAlignment(unsigned NumBits, const GlobalValue *GV = nullptr) const; /// EmitBasicBlockStart - This method prints the label for the specified /// MachineBasicBlock, an alignment (if present) and a comment describing @@ -395,10 +395,10 @@ namespace llvm { //===------------------------------------------------------------------===// /// EmitSLEB128 - emit the specified signed leb128 value. - void EmitSLEB128(int64_t Value, const char *Desc = 0) const; + void EmitSLEB128(int64_t Value, const char *Desc = nullptr) const; /// EmitULEB128 - emit the specified unsigned leb128 value. - void EmitULEB128(uint64_t Value, const char *Desc = 0, + void EmitULEB128(uint64_t Value, const char *Desc = nullptr, unsigned PadTo = 0) const; /// EmitCFAByte - Emit a .byte 42 directive for a DW_CFA_xxx value. @@ -408,7 +408,7 @@ namespace llvm { /// encoding. If verbose assembly output is enabled, we output comments /// describing the encoding. Desc is a string saying what the encoding is /// specifying (e.g. "LSDA"). - void EmitEncodingByte(unsigned Val, const char *Desc = 0) const; + void EmitEncodingByte(unsigned Val, const char *Desc = nullptr) const; /// GetSizeOfEncodedValue - Return the size of the encoding in bytes. unsigned GetSizeOfEncodedValue(unsigned Encoding) const; @@ -491,7 +491,7 @@ namespace llvm { mutable unsigned SetCounter; /// EmitInlineAsm - Emit a blob of inline asm to the output streamer. - void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0, + void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = nullptr, InlineAsm::AsmDialect AsmDialect = InlineAsm::AD_ATT) const; diff --git a/include/llvm/CodeGen/JITCodeEmitter.h b/include/llvm/CodeGen/JITCodeEmitter.h index bb0df2e277..dc2a0272db 100644 --- a/include/llvm/CodeGen/JITCodeEmitter.h +++ b/include/llvm/CodeGen/JITCodeEmitter.h @@ -260,7 +260,7 @@ public: // Check for buffer overflow. if (Size >= (uintptr_t)(BufferEnd-CurBufferPtr)) { CurBufferPtr = BufferEnd; - Result = 0; + Result = nullptr; } else { // Allocate the space. Result = CurBufferPtr; @@ -334,7 +334,9 @@ public: /// getLabelLocations - Return the label locations map of the label IDs to /// their address. - virtual DenseMap<MCSymbol*, uintptr_t> *getLabelLocations() { return 0; } + virtual DenseMap<MCSymbol*, uintptr_t> *getLabelLocations() { + return nullptr; + } }; } // End llvm namespace diff --git a/include/llvm/CodeGen/LatencyPriorityQueue.h b/include/llvm/CodeGen/LatencyPriorityQueue.h index d566da8a59..cf601ae538 100644 --- a/include/llvm/CodeGen/LatencyPriorityQueue.h +++ b/include/llvm/CodeGen/LatencyPriorityQueue.h @@ -62,7 +62,7 @@ namespace llvm { } void releaseState() override { - SUnits = 0; + SUnits = nullptr; } unsigned getLatency(unsigned NodeNum) const { diff --git a/include/llvm/CodeGen/LexicalScopes.h b/include/llvm/CodeGen/LexicalScopes.h index e0593f80ff..d6468bd75c 100644 --- a/include/llvm/CodeGen/LexicalScopes.h +++ b/include/llvm/CodeGen/LexicalScopes.h @@ -44,7 +44,7 @@ typedef std::pair<const MachineInstr *, const MachineInstr *> InsnRange; /// class LexicalScopes { public: - LexicalScopes() : MF(NULL), CurrentFnLexicalScope(NULL) {} + LexicalScopes() : MF(nullptr), CurrentFnLexicalScope(nullptr) {} ~LexicalScopes(); /// initialize - Scan machine function and constuct lexical scope nest, resets @@ -55,7 +55,7 @@ public: void reset(); /// empty - Return true if there is any lexical scope information available. - bool empty() { return CurrentFnLexicalScope == NULL; } + bool empty() { return CurrentFnLexicalScope == nullptr; } /// isCurrentFunctionScope - Return true if given lexical scope represents /// current function. @@ -160,8 +160,8 @@ class LexicalScope { public: LexicalScope(LexicalScope *P, const MDNode *D, const MDNode *I, bool A) - : Parent(P), Desc(D), InlinedAtLocation(I), AbstractScope(A), LastInsn(0), - FirstInsn(0), DFSIn(0), DFSOut(0) { + : Parent(P), Desc(D), InlinedAtLocation(I), AbstractScope(A), + LastInsn(nullptr), FirstInsn(nullptr), DFSIn(0), DFSOut(0) { if (Parent) Parent->addChild(this); } @@ -199,11 +199,11 @@ public: /// closeInsnRange - Create a range based on FirstInsn and LastInsn collected /// until now. This is used when a new scope is encountered while walking /// machine instructions. - void closeInsnRange(LexicalScope *NewScope = NULL) { + void closeInsnRange(LexicalScope *NewScope = nullptr) { assert(LastInsn && "Last insn missing!"); Ranges.push_back(InsnRange(FirstInsn, LastInsn)); - FirstInsn = NULL; - LastInsn = NULL; + FirstInsn = nullptr; + LastInsn = nullptr; // If Parent dominates NewScope then do not close Parent's instruction // range. if (Parent && (!NewScope || !Parent->dominates(NewScope))) diff --git a/include/llvm/CodeGen/LiveInterval.h b/include/llvm/CodeGen/LiveInterval.h index 41d126ac98..6629e60465 100644 --- a/include/llvm/CodeGen/LiveInterval.h +++ b/include/llvm/CodeGen/LiveInterval.h @@ -116,13 +116,13 @@ namespace llvm { /// Return the value leaving the instruction, if any. This can be a /// live-through value, or a live def. A dead def returns NULL. VNInfo *valueOut() const { - return isDeadDef() ? 0 : LateVal; + return isDeadDef() ? nullptr : LateVal; } /// Return the value defined by this instruction, if any. This includes /// dead defs, it is the value created by the instruction's def operands. VNInfo *valueDefined() const { - return EarlyVal == LateVal ? 0 : LateVal; + return EarlyVal == LateVal ? nullptr : LateVal; } /// Return the end point of the last live range segment to interact with @@ -154,7 +154,7 @@ namespace llvm { SlotIndex end; // End point of the interval (exclusive) VNInfo *valno; // identifier for the value contained in this segment. - Segment() : valno(0) {} + Segment() : valno(nullptr) {} Segment(SlotIndex S, SlotIndex E, VNInfo *V) : start(S), end(E), valno(V) { @@ -336,20 +336,20 @@ namespace llvm { /// is none. const Segment *getSegmentContaining(SlotIndex Idx) const { const_iterator I = FindSegmentContaining(Idx); - return I == end() ? 0 : &*I; + return I == end() ? nullptr : &*I; } /// Return the live segment that contains the specified index, or null if /// there is none. Segment *getSegmentContaining(SlotIndex Idx) { iterator I = FindSegmentContaining(Idx); - return I == end() ? 0 : &*I; + return I == end() ? nullptr : &*I; } /// getVNInfoAt - Return the VNInfo that is live at Idx, or NULL. VNInfo *getVNInfoAt(SlotIndex Idx) const { const_iterator I = FindSegmentContaining(Idx); - return I == end() ? 0 : I->valno; + return I == end() ? nullptr : I->valno; } /// getVNInfoBefore - Return the VNInfo that is live up to but not @@ -357,7 +357,7 @@ namespace llvm { /// used by an instruction at this SlotIndex position. VNInfo *getVNInfoBefore(SlotIndex Idx) const { const_iterator I = FindSegmentContaining(Idx.getPrevSlot()); - return I == end() ? 0 : I->valno; + return I == end() ? nullptr : I->valno; } /// Return an iterator to the segment that contains the specified index, or @@ -443,13 +443,13 @@ namespace llvm { const_iterator I = find(Idx.getBaseIndex()); const_iterator E = end(); if (I == E) - return LiveQueryResult(0, 0, SlotIndex(), false); + return LiveQueryResult(nullptr, nullptr, SlotIndex(), false); // Is this an instruction live-in segment? // If Idx is the start index of a basic block, include live-in segments // that start at Idx.getBaseIndex(). - VNInfo *EarlyVal = 0; - VNInfo *LateVal = 0; + VNInfo *EarlyVal = nullptr; + VNInfo *LateVal = nullptr; SlotIndex EndPoint; bool Kill = false; if (I->start <= Idx.getBaseIndex()) { @@ -466,7 +466,7 @@ namespace llvm { // predecessor. // Such a value is not live-in. if (EarlyVal->def == Idx.getBaseIndex()) - EarlyVal = 0; + EarlyVal = nullptr; } // I now points to the segment that may be live-through, or defined by // this instr. Ignore segments starting after the current instr. @@ -597,7 +597,7 @@ namespace llvm { public: /// Create a LiveRangeUpdater for adding segments to LR. /// LR will temporarily be in an invalid state until flush() is called. - LiveRangeUpdater(LiveRange *lr = 0) : LR(lr) {} + LiveRangeUpdater(LiveRange *lr = nullptr) : LR(lr) {} ~LiveRangeUpdater() { flush(); } diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h index 54925938ec..ddd623c2a3 100644 --- a/include/llvm/CodeGen/LiveIntervalAnalysis.h +++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h @@ -137,7 +137,7 @@ namespace llvm { // Interval removal. void removeInterval(unsigned Reg) { delete VirtRegIntervals[Reg]; - VirtRegIntervals[Reg] = 0; + VirtRegIntervals[Reg] = nullptr; } /// Given a register and an instruction, adds a live segment from that @@ -153,7 +153,7 @@ namespace llvm { /// Return true if the interval may have been separated into multiple /// connected components. bool shrinkToUses(LiveInterval *li, - SmallVectorImpl<MachineInstr*> *dead = 0); + SmallVectorImpl<MachineInstr*> *dead = nullptr); /// extendToIndices - Extend the live range of LI to reach all points in /// Indices. The points in the Indices array must be jointly dominated by @@ -262,7 +262,7 @@ namespace llvm { bool runOnMachineFunction(MachineFunction&) override; /// print - Implement the dump method. - void print(raw_ostream &O, const Module* = 0) const override; + void print(raw_ostream &O, const Module* = nullptr) const override; /// intervalIsInOneMBB - If LI is confined to a single basic block, return /// a pointer to that block. If LI is live in to or out of any block, diff --git a/include/llvm/CodeGen/LiveIntervalUnion.h b/include/llvm/CodeGen/LiveIntervalUnion.h index 95933d11db..2f40509a11 100644 --- a/include/llvm/CodeGen/LiveIntervalUnion.h +++ b/include/llvm/CodeGen/LiveIntervalUnion.h @@ -122,8 +122,8 @@ public: {} void clear() { - LiveUnion = NULL; - VirtReg = NULL; + LiveUnion = nullptr; + VirtReg = nullptr; InterferingVRegs.clear(); CheckedFirstInterference = false; SeenAllInterferences = false; @@ -182,7 +182,7 @@ public: unsigned Size; LiveIntervalUnion *LIUs; public: - Array() : Size(0), LIUs(0) {} + Array() : Size(0), LIUs(nullptr) {} ~Array() { clear(); } // Initialize the array to have Size entries. diff --git a/include/llvm/CodeGen/LivePhysRegs.h b/include/llvm/CodeGen/LivePhysRegs.h index c93eaf5b13..847092b1d8 100644 --- a/include/llvm/CodeGen/LivePhysRegs.h +++ b/include/llvm/CodeGen/LivePhysRegs.h @@ -48,7 +48,7 @@ class LivePhysRegs { LivePhysRegs &operator=(const LivePhysRegs&) LLVM_DELETED_FUNCTION; public: /// \brief Constructs a new empty LivePhysRegs set. - LivePhysRegs() : TRI(0), LiveRegs() {} + LivePhysRegs() : TRI(nullptr), LiveRegs() {} /// \brief Constructs and initialize an empty LivePhysRegs set. LivePhysRegs(const TargetRegisterInfo *TRI) : TRI(TRI) { diff --git a/include/llvm/CodeGen/LiveRangeEdit.h b/include/llvm/CodeGen/LiveRangeEdit.h index 4ce39e31d1..5767cab1a4 100644 --- a/include/llvm/CodeGen/LiveRangeEdit.h +++ b/include/llvm/CodeGen/LiveRangeEdit.h @@ -116,7 +116,7 @@ public: MachineFunction &MF, LiveIntervals &lis, VirtRegMap *vrm, - Delegate *delegate = 0) + Delegate *delegate = nullptr) : Parent(parent), NewRegs(newRegs), MRI(MF.getRegInfo()), LIS(lis), VRM(vrm), TII(*MF.getTarget().getInstrInfo()), @@ -174,7 +174,7 @@ public: struct Remat { VNInfo *ParentVNI; // parent_'s value at the remat location. MachineInstr *OrigMI; // Instruction defining ParentVNI. - explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI), OrigMI(0) {} + explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI), OrigMI(nullptr) {} }; /// canRematerializeAt - Determine if ParentVNI can be rematerialized at diff --git a/include/llvm/CodeGen/LiveStackAnalysis.h b/include/llvm/CodeGen/LiveStackAnalysis.h index ac32a9c590..df683983fa 100644 --- a/include/llvm/CodeGen/LiveStackAnalysis.h +++ b/include/llvm/CodeGen/LiveStackAnalysis.h @@ -92,7 +92,7 @@ namespace llvm { bool runOnMachineFunction(MachineFunction&) override; /// print - Implement the dump method. - void print(raw_ostream &O, const Module* = 0) const override; + void print(raw_ostream &O, const Module* = nullptr) const override; }; } diff --git a/include/llvm/CodeGen/MachineBasicBlock.h b/include/llvm/CodeGen/MachineBasicBlock.h index afa7673c7f..129d3acf0a 100644 --- a/include/llvm/CodeGen/MachineBasicBlock.h +++ b/include/llvm/CodeGen/MachineBasicBlock.h @@ -160,7 +160,7 @@ public: template<class OtherTy, class OtherIterTy> bundle_iterator(const bundle_iterator<OtherTy, OtherIterTy> &I) : MII(I.getInstrIterator()) {} - bundle_iterator() : MII(0) {} + bundle_iterator() : MII(nullptr) {} Ty &operator*() const { return *MII; } Ty *operator->() const { return &operator*(); } @@ -621,7 +621,7 @@ public: // Debugging methods. void dump() const; - void print(raw_ostream &OS, SlotIndexes* = 0) const; + void print(raw_ostream &OS, SlotIndexes* = nullptr) const; // Printing method used by LoopInfo. void printAsOperand(raw_ostream &OS, bool PrintType = true); diff --git a/include/llvm/CodeGen/MachineCodeEmitter.h b/include/llvm/CodeGen/MachineCodeEmitter.h index f729cedde4..81b0ba1e7c 100644 --- a/include/llvm/CodeGen/MachineCodeEmitter.h +++ b/include/llvm/CodeGen/MachineCodeEmitter.h @@ -262,7 +262,7 @@ public: // Check for buffer overflow. if (Size >= (uintptr_t)(BufferEnd-CurBufferPtr)) { CurBufferPtr = BufferEnd; - Result = 0; + Result = nullptr; } else { // Allocate the space. Result = CurBufferPtr; diff --git a/include/llvm/CodeGen/MachineFrameInfo.h b/include/llvm/CodeGen/MachineFrameInfo.h index 1dedd74492..bd0ea11911 100644 --- a/include/llvm/CodeGen/MachineFrameInfo.h +++ b/include/llvm/CodeGen/MachineFrameInfo.h @@ -519,7 +519,7 @@ public: /// a nonnegative identifier to represent it. /// int CreateStackObject(uint64_t Size, unsigned Alignment, bool isSS, - const AllocaInst *Alloca = 0); + const AllocaInst *Alloca = nullptr); /// CreateSpillStackObject - Create a new statically sized stack object that /// represents a spill slot, returning a nonnegative identifier to represent diff --git a/include/llvm/CodeGen/MachineFunction.h b/include/llvm/CodeGen/MachineFunction.h index a55d436848..f4c2542b99 100644 --- a/include/llvm/CodeGen/MachineFunction.h +++ b/include/llvm/CodeGen/MachineFunction.h @@ -271,12 +271,12 @@ public: /// dense, and match the ordering of the blocks within the function. If a /// specific MachineBasicBlock is specified, only that block and those after /// it are renumbered. - void RenumberBlocks(MachineBasicBlock *MBBFrom = 0); + void RenumberBlocks(MachineBasicBlock *MBBFrom = nullptr); /// print - Print out the MachineFunction in a format suitable for debugging /// to the specified stream. /// - void print(raw_ostream &OS, SlotIndexes* = 0) const; + void print(raw_ostream &OS, SlotIndexes* = nullptr) const; /// viewCFG - This function is meant for use from the debugger. You can just /// say 'call F->viewCFG()' and a ghostview window should pop up from the @@ -299,7 +299,7 @@ public: /// verify - Run the current MachineFunction through the machine code /// verifier, useful for debugger use. - void verify(Pass *p = NULL, const char *Banner = NULL) const; + void verify(Pass *p = nullptr, const char *Banner = nullptr) const; // Provide accessors for the MachineBasicBlock list... typedef BasicBlockListType::iterator iterator; @@ -367,7 +367,7 @@ public: /// implementation. void removeFromMBBNumbering(unsigned N) { assert(N < MBBNumbering.size() && "Illegal basic block #"); - MBBNumbering[N] = 0; + MBBNumbering[N] = nullptr; } /// CreateMachineInstr - Allocate a new MachineInstr. Use this instead @@ -392,7 +392,7 @@ public: /// CreateMachineBasicBlock - Allocate a new MachineBasicBlock. Use this /// instead of `new MachineBasicBlock'. /// - MachineBasicBlock *CreateMachineBasicBlock(const BasicBlock *bb = 0); + MachineBasicBlock *CreateMachineBasicBlock(const BasicBlock *bb = nullptr); /// DeleteMachineBasicBlock - Delete the given MachineBasicBlock. /// @@ -404,8 +404,8 @@ public: MachineMemOperand *getMachineMemOperand(MachinePointerInfo PtrInfo, unsigned f, uint64_t s, unsigned base_alignment, - const MDNode *TBAAInfo = 0, - const MDNode *Ranges = 0); + const MDNode *TBAAInfo = nullptr, + const MDNode *Ranges = nullptr); /// getMachineMemOperand - Allocate a new MachineMemOperand by copying /// an existing one, adjusting by an offset and using the given size. diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index 9e815623a7..9cafb3532a 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -760,7 +760,8 @@ public: /// is a read of a super-register. /// This does not count partial redefines of virtual registers as reads: /// %reg1024:6 = OP. - bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { + bool readsRegister(unsigned Reg, + const TargetRegisterInfo *TRI = nullptr) const { return findRegisterUseOperandIdx(Reg, false, TRI) != -1; } @@ -776,12 +777,13 @@ public: /// partial defines. /// If Ops is not null, all operand indices for Reg are added. std::pair<bool,bool> readsWritesVirtualRegister(unsigned Reg, - SmallVectorImpl<unsigned> *Ops = 0) const; + SmallVectorImpl<unsigned> *Ops = nullptr) const; /// killsRegister - Return true if the MachineInstr kills the specified /// register. If TargetRegisterInfo is passed, then it also checks if there is /// a kill of a super-register. - bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const { + bool killsRegister(unsigned Reg, + const TargetRegisterInfo *TRI = nullptr) const { return findRegisterUseOperandIdx(Reg, true, TRI) != -1; } @@ -789,7 +791,8 @@ public: /// specified register. If TargetRegisterInfo is passed, then it also checks /// if there is a def of a super-register. /// NOTE: It's ignoring subreg indices on virtual registers. - bool definesRegister(unsigned Reg, const TargetRegisterInfo *TRI=NULL) const { + bool definesRegister(unsigned Reg, + const TargetRegisterInfo *TRI = nullptr) const { return findRegisterDefOperandIdx(Reg, false, false, TRI) != -1; } @@ -804,7 +807,7 @@ public: /// instruction. If TargetRegisterInfo is passed, then it also checks /// if there is a dead def of a super-register. bool registerDefIsDead(unsigned Reg, - const TargetRegisterInfo *TRI = NULL) const { + const TargetRegisterInfo *TRI = nullptr) const { return findRegisterDefOperandIdx(Reg, true, false, TRI) != -1; } @@ -812,14 +815,14 @@ public: /// the specific register or -1 if it is not found. It further tightens /// the search criteria to a use that kills the register if isKill is true. int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false, - const TargetRegisterInfo *TRI = NULL) const; + const TargetRegisterInfo *TRI = nullptr) const; /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns /// a pointer to the MachineOperand rather than an index. MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false, - const TargetRegisterInfo *TRI = NULL) { + const TargetRegisterInfo *TRI = nullptr) { int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI); - return (Idx == -1) ? NULL : &getOperand(Idx); + return (Idx == -1) ? nullptr : &getOperand(Idx); } /// findRegisterDefOperandIdx() - Returns the operand index that is a def of @@ -830,14 +833,14 @@ public: /// This may also return a register mask operand when Overlap is true. int findRegisterDefOperandIdx(unsigned Reg, bool isDead = false, bool Overlap = false, - const TargetRegisterInfo *TRI = NULL) const; + const TargetRegisterInfo *TRI = nullptr) const; /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns /// a pointer to the MachineOperand rather than an index. MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false, - const TargetRegisterInfo *TRI = NULL) { + const TargetRegisterInfo *TRI = nullptr) { int Idx = findRegisterDefOperandIdx(Reg, isDead, false, TRI); - return (Idx == -1) ? NULL : &getOperand(Idx); + return (Idx == -1) ? nullptr : &getOperand(Idx); } /// findFirstPredOperandIdx() - Find the index of the first operand in the @@ -855,7 +858,7 @@ public: /// The flag operand is an immediate that can be decoded with methods like /// InlineAsm::hasRegClassConstraint(). /// - int findInlineAsmFlagIdx(unsigned OpIdx, unsigned *GroupNo = 0) const; + int findInlineAsmFlagIdx(unsigned OpIdx, unsigned *GroupNo = nullptr) const; /// getRegClassConstraint - Compute the static register class constraint for /// operand OpIdx. For normal instructions, this is derived from the @@ -917,7 +920,8 @@ public: /// check if the register def is tied to a source operand, due to either /// two-address elimination or inline assembly constraints. Returns the /// first tied use operand index by reference if UseOpIdx is not null. - bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx = 0) const { + bool isRegTiedToUseOperand(unsigned DefOpIdx, + unsigned *UseOpIdx = nullptr) const { const MachineOperand &MO = getOperand(DefOpIdx); if (!MO.isReg() || !MO.isDef() || !MO.isTied()) return false; @@ -929,7 +933,8 @@ public: /// isRegTiedToDefOperand - Return true if the use operand of the specified /// index is tied to an def operand. It also returns the def operand index by /// reference if DefOpIdx is not null. - bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0) const { + bool isRegTiedToDefOperand(unsigned UseOpIdx, + unsigned *DefOpIdx = nullptr) const { const MachineOperand &MO = getOperand(UseOpIdx); if (!MO.isReg() || !MO.isUse() || !MO.isTied()) return false; @@ -968,7 +973,8 @@ public: /// addRegisterDefined - We have determined MI defines a register. Make sure /// there is an operand defining Reg. - void addRegisterDefined(unsigned Reg, const TargetRegisterInfo *RegInfo = 0); + void addRegisterDefined(unsigned Reg, + const TargetRegisterInfo *RegInfo = nullptr); /// setPhysRegsDeadExcept - Mark every physreg used by this instruction as /// dead except those in the UsedRegs list. @@ -1022,7 +1028,7 @@ public: // // Debugging support // - void print(raw_ostream &OS, const TargetMachine *TM = 0, + void print(raw_ostream &OS, const TargetMachine *TM = nullptr, bool SkipOpers = false) const; void dump() const; @@ -1123,7 +1129,7 @@ private: /// useful for CSE, etc. struct MachineInstrExpressionTrait : DenseMapInfo<MachineInstr*> { static inline MachineInstr *getEmptyKey() { - return 0; + return nullptr; } static inline MachineInstr *getTombstoneKey() { diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h index d7eb7060c9..21a482cdbd 100644 --- a/include/llvm/CodeGen/MachineInstrBuilder.h +++ b/include/llvm/CodeGen/MachineInstrBuilder.h @@ -46,7 +46,7 @@ class MachineInstrBuilder { MachineFunction *MF; MachineInstr *MI; public: - MachineInstrBuilder() : MF(0), MI(0) {} + MachineInstrBuilder() : MF(nullptr), MI(nullptr) {} /// Create a MachineInstrBuilder for manipulating an existing instruction. /// F must be the machine function that was used to allocate I. diff --git a/include/llvm/CodeGen/MachineInstrBundle.h b/include/llvm/CodeGen/MachineInstrBundle.h index 9519edb3eb..1220224863 100644 --- a/include/llvm/CodeGen/MachineInstrBundle.h +++ b/include/llvm/CodeGen/MachineInstrBundle.h @@ -196,7 +196,7 @@ public: /// each operand referring to Reg. /// @returns A filled-in RegInfo struct. VirtRegInfo analyzeVirtReg(unsigned Reg, - SmallVectorImpl<std::pair<MachineInstr*, unsigned> > *Ops = 0); + SmallVectorImpl<std::pair<MachineInstr*, unsigned> > *Ops = nullptr); /// analyzePhysReg - Analyze how the current instruction or bundle uses a /// physical register. This function should not be called after operator++(), diff --git a/include/llvm/CodeGen/MachineMemOperand.h b/include/llvm/CodeGen/MachineMemOperand.h index f01b8ebca1..68b749a56f 100644 --- a/include/llvm/CodeGen/MachineMemOperand.h +++ b/include/llvm/CodeGen/MachineMemOperand.h @@ -38,11 +38,11 @@ struct MachinePointerInfo { /// Offset - This is an offset from the base Value*. int64_t Offset; - explicit MachinePointerInfo(const Value *v = 0, int64_t offset = 0) + explicit MachinePointerInfo(const Value *v = nullptr, int64_t offset = 0) : V(v), Offset(offset) {} MachinePointerInfo getWithOffset(int64_t O) const { - if (V == 0) return MachinePointerInfo(0, 0); + if (V == nullptr) return MachinePointerInfo(nullptr, 0); return MachinePointerInfo(V, Offset+O); } @@ -109,8 +109,8 @@ public: /// MachineMemOperand - Construct an MachineMemOperand object with the /// specified PtrInfo, flags, size, and base alignment. MachineMemOperand(MachinePointerInfo PtrInfo, unsigned flags, uint64_t s, - unsigned base_alignment, const MDNode *TBAAInfo = 0, - const MDNode *Ranges = 0); + unsigned base_alignment, const MDNode *TBAAInfo = nullptr, + const MDNode *Ranges = nullptr); const MachinePointerInfo &getPointerInfo() const { return PtrInfo; } diff --git a/include/llvm/CodeGen/MachineModuleInfo.h b/include/llvm/CodeGen/MachineModuleInfo.h index 28f4544137..6d8d05684c 100644 --- a/include/llvm/CodeGen/MachineModuleInfo.h +++ b/include/llvm/CodeGen/MachineModuleInfo.h @@ -71,7 +71,7 @@ struct LandingPadInfo { std::vector<int> TypeIds; // List of type ids (filters negative) explicit LandingPadInfo(MachineBasicBlock *MBB) - : LandingPadBlock(MBB), LandingPadLabel(0), Personality(0) {} + : LandingPadBlock(MBB), LandingPadLabel(nullptr), Personality(nullptr) {} }; //===----------------------------------------------------------------------===// @@ -201,7 +201,7 @@ public: /// template<typename Ty> Ty &getObjFileInfo() { - if (ObjFileMMI == 0) + if (ObjFileMMI == nullptr) ObjFileMMI = new Ty(*this); return *static_cast<Ty*>(ObjFileMMI); } @@ -334,7 +334,7 @@ public: /// TidyLandingPads - Remap landing pad labels and remove any deleted landing /// pads. - void TidyLandingPads(DenseMap<MCSymbol*, uintptr_t> *LPMap = 0); + void TidyLandingPads(DenseMap<MCSymbol*, uintptr_t> *LPMap = nullptr); /// getLandingPads - Return a reference to the landing pad info for the /// current function. diff --git a/include/llvm/CodeGen/MachineOperand.h b/include/llvm/CodeGen/MachineOperand.h index 57bdb4c7fa..39fa411b3c 100644 --- a/include/llvm/CodeGen/MachineOperand.h +++ b/include/llvm/CodeGen/MachineOperand.h @@ -181,7 +181,7 @@ private: } Contents; explicit MachineOperand(MachineOperandType K) - : OpKind(K), SubReg_TargetFlags(0), ParentMI(0) {} + : OpKind(K), SubReg_TargetFlags(0), ParentMI(nullptr) {} public: /// getType - Returns the MachineOperandType for this operand. /// @@ -215,9 +215,9 @@ public: /// /// Never call clearParent() on an operand in a MachineInstr. /// - void clearParent() { ParentMI = 0; } + void clearParent() { ParentMI = nullptr; } - void print(raw_ostream &os, const TargetMachine *TM = 0) const; + void print(raw_ostream &os, const TargetMachine *TM = nullptr) const; //===--------------------------------------------------------------------===// // Accessors that tell you what kind of MachineOperand you're looking at. @@ -593,8 +593,8 @@ public: Op.TiedTo = 0; Op.IsDebug = isDebug; Op.SmallContents.RegNo = Reg; - Op.Contents.Reg.Prev = 0; - Op.Contents.Reg.Next = 0; + Op.Contents.Reg.Prev = nullptr; + Op.Contents.Reg.Next = nullptr; Op.setSubReg(SubReg); return Op; } @@ -711,12 +711,12 @@ private: /// part of a machine instruction. bool isOnRegUseList() const { assert(isReg() && "Can only add reg operand to use lists"); - return Contents.Reg.Prev != 0; + return Contents.Reg.Prev != nullptr; } }; inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) { - MO.print(OS, 0); + MO.print(OS, nullptr); return OS; } diff --git a/include/llvm/CodeGen/MachinePassRegistry.h b/include/llvm/CodeGen/MachinePassRegistry.h index cd212abfa2..c962e68724 100644 --- a/include/llvm/CodeGen/MachinePassRegistry.h +++ b/include/llvm/CodeGen/MachinePassRegistry.h @@ -59,7 +59,7 @@ private: public: MachinePassRegistryNode(const char *N, const char *D, MachinePassCtor C) - : Next(NULL) + : Next(nullptr) , Name(N) , Description(D) , Ctor(C) @@ -123,7 +123,7 @@ class RegisterPassParser : public MachinePassRegistryListener, public cl::parser<typename RegistryClass::FunctionPassCtor> { public: RegisterPassParser() {} - ~RegisterPassParser() { RegistryClass::setListener(NULL); } + ~RegisterPassParser() { RegistryClass::setListener(nullptr); } void initialize(cl::Option &O) { cl::parser<typename RegistryClass::FunctionPassCtor>::initialize(O); diff --git a/include/llvm/CodeGen/MachinePostDominators.h b/include/llvm/CodeGen/MachinePostDominators.h index a6f9f3df76..beb2c4f0c5 100644 --- a/include/llvm/CodeGen/MachinePostDominators.h +++ b/include/llvm/CodeGen/MachinePostDominators.h @@ -79,7 +79,7 @@ public: bool runOnMachineFunction(MachineFunction &MF) override; void getAnalysisUsage(AnalysisUsage &AU) const override; - void print(llvm::raw_ostream &OS, const Module *M = 0) const override; + void print(llvm::raw_ostream &OS, const Module *M = nullptr) const override; }; } //end of namespace llvm diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h index 228513076e..51139f72ba 100644 --- a/include/llvm/CodeGen/MachineRegisterInfo.h +++ b/include/llvm/CodeGen/MachineRegisterInfo.h @@ -135,7 +135,7 @@ public: // notifications, we will need to change to using a list. assert(TheDelegate == delegate && "Only the current delegate can perform reset!"); - TheDelegate = 0; + TheDelegate = nullptr; } void setDelegate(Delegate *delegate) { @@ -223,7 +223,7 @@ public: reg_iterator reg_begin(unsigned RegNo) const { return reg_iterator(getRegUseDefListHead(RegNo)); } - static reg_iterator reg_end() { return reg_iterator(0); } + static reg_iterator reg_end() { return reg_iterator(nullptr); } inline iterator_range<reg_iterator> reg_operands(unsigned Reg) const { return iterator_range<reg_iterator>(reg_begin(Reg), reg_end()); @@ -236,7 +236,9 @@ public: reg_instr_iterator reg_instr_begin(unsigned RegNo) const { return reg_instr_iterator(getRegUseDefListHead(RegNo)); } - static reg_instr_iterator reg_instr_end() { return reg_instr_iterator(0); } + static reg_instr_iterator reg_instr_end() { + return reg_instr_iterator(nullptr); + } inline iterator_range<reg_instr_iterator> reg_instructions(unsigned Reg) const { @@ -251,7 +253,9 @@ public: reg_bundle_iterator reg_bundle_begin(unsigned RegNo) const { return reg_bundle_iterator(getRegUseDefListHead(RegNo)); } - static reg_bundle_iterator reg_bundle_end() { return reg_bundle_iterator(0); } + static reg_bundle_iterator reg_bundle_end() { + return reg_bundle_iterator(nullptr); + } inline iterator_range<reg_bundle_iterator> reg_bundles(unsigned Reg) const { return iterator_range<reg_bundle_iterator>(reg_bundle_begin(Reg), @@ -269,7 +273,9 @@ public: reg_nodbg_iterator reg_nodbg_begin(unsigned RegNo) const { return reg_nodbg_iterator(getRegUseDefListHead(RegNo)); } - static reg_nodbg_iterator reg_nodbg_end() { return reg_nodbg_iterator(0); } + static reg_nodbg_iterator reg_nodbg_end() { + return reg_nodbg_iterator(nullptr); + } inline iterator_range<reg_nodbg_iterator> reg_nodbg_operands(unsigned Reg) const { @@ -286,7 +292,7 @@ public: return reg_instr_nodbg_iterator(getRegUseDefListHead(RegNo)); } static reg_instr_nodbg_iterator reg_instr_nodbg_end() { - return reg_instr_nodbg_iterator(0); + return reg_instr_nodbg_iterator(nullptr); } inline iterator_range<reg_instr_nodbg_iterator> @@ -304,7 +310,7 @@ public: return reg_bundle_nodbg_iterator(getRegUseDefListHead(RegNo)); } static reg_bundle_nodbg_iterator reg_bundle_nodbg_end() { - return reg_bundle_nodbg_iterator(0); + return reg_bundle_nodbg_iterator(nullptr); } inline iterator_range<reg_bundle_nodbg_iterator> @@ -325,7 +331,7 @@ public: def_iterator def_begin(unsigned RegNo) const { return def_iterator(getRegUseDefListHead(RegNo)); } - static def_iterator def_end() { return def_iterator(0); } + static def_iterator def_end() { return def_iterator(nullptr); } inline iterator_range<def_iterator> def_operands(unsigned Reg) const { return iterator_range<def_iterator>(def_begin(Reg), def_end()); @@ -338,7 +344,9 @@ public: def_instr_iterator def_instr_begin(unsigned RegNo) const { return def_instr_iterator(getRegUseDefListHead(RegNo)); } - static def_instr_iterator def_instr_end() { return def_instr_iterator(0); } + static def_instr_iterator def_instr_end() { + return def_instr_iterator(nullptr); + } inline iterator_range<def_instr_iterator> def_instructions(unsigned Reg) const { @@ -353,7 +361,9 @@ public: def_bundle_iterator def_bundle_begin(unsigned RegNo) const { return def_bundle_iterator(getRegUseDefListHead(RegNo)); } - static def_bundle_iterator def_bundle_end() { return def_bundle_iterator(0); } + static def_bundle_iterator def_bundle_end() { + return def_bundle_iterator(nullptr); + } inline iterator_range<def_bundle_iterator> def_bundles(unsigned Reg) const { return iterator_range<def_bundle_iterator>(def_bundle_begin(Reg), @@ -379,7 +389,7 @@ public: use_iterator use_begin(unsigned RegNo) const { return use_iterator(getRegUseDefListHead(RegNo)); } - static use_iterator use_end() { return use_iterator(0); } + static use_iterator use_end() { return use_iterator(nullptr); } inline iterator_range<use_iterator> use_operands(unsigned Reg) const { return iterator_range<use_iterator>(use_begin(Reg), use_end()); @@ -392,7 +402,9 @@ public: use_instr_iterator use_instr_begin(unsigned RegNo) const { return use_instr_iterator(getRegUseDefListHead(RegNo)); } - static use_instr_iterator use_instr_end() { return use_instr_iterator(0); } + static use_instr_iterator use_instr_end() { + return use_instr_iterator(nullptr); + } inline iterator_range<use_instr_iterator> use_instructions(unsigned Reg) const { @@ -407,7 +419,9 @@ public: use_bundle_iterator use_bundle_begin(unsigned RegNo) const { return use_bundle_iterator(getRegUseDefListHead(RegNo)); } - static use_bundle_iterator use_bundle_end() { return use_bundle_iterator(0); } + static use_bundle_iterator use_bundle_end() { + return use_bundle_iterator(nullptr); + } inline iterator_range<use_bundle_iterator> use_bundles(unsigned Reg) const { return iterator_range<use_bundle_iterator>(use_bundle_begin(Reg), @@ -434,7 +448,9 @@ public: use_nodbg_iterator use_nodbg_begin(unsigned RegNo) const { return use_nodbg_iterator(getRegUseDefListHead(RegNo)); } - static use_nodbg_iterator use_nodbg_end() { return use_nodbg_iterator(0); } + static use_nodbg_iterator use_nodbg_end() { + return use_nodbg_iterator(nullptr); + } inline iterator_range<use_nodbg_iterator> use_nodbg_operands(unsigned Reg) const { @@ -451,7 +467,7 @@ public: return use_instr_nodbg_iterator(getRegUseDefListHead(RegNo)); } static use_instr_nodbg_iterator use_instr_nodbg_end() { - return use_instr_nodbg_iterator(0); + return use_instr_nodbg_iterator(nullptr); } inline iterator_range<use_instr_nodbg_iterator> @@ -469,7 +485,7 @@ public: return use_bundle_nodbg_iterator(getRegUseDefListHead(RegNo)); } static use_bundle_nodbg_iterator use_bundle_nodbg_end() { - return use_bundle_nodbg_iterator(0); + return use_bundle_nodbg_iterator(nullptr); } inline iterator_range<use_bundle_nodbg_iterator> @@ -779,7 +795,7 @@ public: if (!ReturnUses) { if (Op) { if (Op->isUse()) - Op = 0; + Op = nullptr; else assert(!Op->isDebug() && "Can't have debug defs"); } @@ -797,7 +813,7 @@ public: MachineInstr, ptrdiff_t>::pointer pointer; defusechain_iterator(const defusechain_iterator &I) : Op(I.Op) {} - defusechain_iterator() : Op(0) {} + defusechain_iterator() : Op(nullptr) {} bool operator==(const defusechain_iterator &x) const { return Op == x.Op; @@ -807,7 +823,7 @@ public: } /// atEnd - return true if this iterator is equal to reg_end() on the value. - bool atEnd() const { return Op == 0; } + bool atEnd() const { return Op == nullptr; } // Iterator traversal: forward iteration only defusechain_iterator &operator++() { // Preincrement @@ -882,7 +898,7 @@ public: if (!ReturnUses) { if (Op) { if (Op->isUse()) - Op = 0; + Op = nullptr; else assert(!Op->isDebug() && "Can't have debug defs"); } @@ -900,7 +916,7 @@ public: MachineInstr, ptrdiff_t>::pointer pointer; defusechain_instr_iterator(const defusechain_instr_iterator &I) : Op(I.Op){} - defusechain_instr_iterator() : Op(0) {} + defusechain_instr_iterator() : Op(nullptr) {} bool operator==(const defusechain_instr_iterator &x) const { return Op == x.Op; @@ -910,7 +926,7 @@ public: } /// atEnd - return true if this iterator is equal to reg_end() on the value. - bool atEnd() const { return Op == 0; } + bool atEnd() const { return Op == nullptr; } // Iterator traversal: forward iteration only defusechain_instr_iterator &operator++() { // Preincrement @@ -957,7 +973,7 @@ class PSetIterator { const int *PSet; unsigned Weight; public: - PSetIterator(): PSet(0), Weight(0) {} + PSetIterator(): PSet(nullptr), Weight(0) {} PSetIterator(unsigned RegUnit, const MachineRegisterInfo *MRI) { const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo(); if (TargetRegisterInfo::isVirtualRegister(RegUnit)) { @@ -970,7 +986,7 @@ public: Weight = TRI->getRegUnitWeight(RegUnit); } if (*PSet == -1) - PSet = 0; + PSet = nullptr; } bool isValid() const { return PSet; } @@ -982,7 +998,7 @@ public: assert(isValid() && "Invalid PSetIterator."); ++PSet; if (*PSet == -1) - PSet = 0; + PSet = nullptr; } }; diff --git a/include/llvm/CodeGen/MachineSSAUpdater.h b/include/llvm/CodeGen/MachineSSAUpdater.h index 8fc367e258..486a26e927 100644 --- a/include/llvm/CodeGen/MachineSSAUpdater.h +++ b/include/llvm/CodeGen/MachineSSAUpdater.h @@ -57,7 +57,7 @@ public: /// MachineSSAUpdater constructor. If InsertedPHIs is specified, it will be /// filled in with all PHI Nodes created by rewriting. explicit MachineSSAUpdater(MachineFunction &MF, - SmallVectorImpl<MachineInstr*> *InsertedPHIs = 0); + SmallVectorImpl<MachineInstr*> *InsertedPHIs = nullptr); ~MachineSSAUpdater(); /// Initialize - Reset this object to get ready for a new set of SSA diff --git a/include/llvm/CodeGen/MachineScheduler.h b/include/llvm/CodeGen/MachineScheduler.h index c54300ca4f..10c729cf3a 100644 --- a/include/llvm/CodeGen/MachineScheduler.h +++ b/include/llvm/CodeGen/MachineScheduler.h @@ -250,7 +250,7 @@ public: ScheduleDAGInstrs(*C->MF, *C->MLI, *C->MDT, IsPostRA, /*RemoveKillFlags=*/IsPostRA, C->LIS), AA(C->AA), SchedImpl(S), Topo(SUnits, &ExitSU), CurrentTop(), - CurrentBottom(), NextClusterPred(NULL), NextClusterSucc(NULL) { + CurrentBottom(), NextClusterPred(nullptr), NextClusterSucc(nullptr) { #ifndef NDEBUG NumInstrsScheduled = 0; #endif @@ -377,7 +377,7 @@ protected: public: ScheduleDAGMILive(MachineSchedContext *C, MachineSchedStrategy *S): ScheduleDAGMI(C, S, /*IsPostRA=*/false), RegClassInfo(C->RegClassInfo), - DFSResult(0), ShouldTrackPressure(false), RPTracker(RegPressure), + DFSResult(nullptr), ShouldTrackPressure(false), RPTracker(RegPressure), TopRPTracker(TopPressure), BotRPTracker(BotPressure) {} @@ -628,9 +628,9 @@ public: /// Pending queues extend the ready queues with the same ID and the /// PendingFlag set. SchedBoundary(unsigned ID, const Twine &Name): - DAG(0), SchedModel(0), Rem(0), Available(ID, Name+".A"), + DAG(nullptr), SchedModel(nullptr), Rem(nullptr), Available(ID, Name+".A"), Pending(ID << LogMaxQID, Name+".P"), - HazardRec(0) { + HazardRec(nullptr) { reset(); } diff --git a/include/llvm/CodeGen/MachineTraceMetrics.h b/include/llvm/CodeGen/MachineTraceMetrics.h index dc0bc1d6c2..323b694f39 100644 --- a/include/llvm/CodeGen/MachineTraceMetrics.h +++ b/include/llvm/CodeGen/MachineTraceMetrics.h @@ -154,7 +154,7 @@ public: unsigned InstrHeight; TraceBlockInfo() : - Pred(0), Succ(0), + Pred(nullptr), Succ(nullptr), InstrDepth(~0u), InstrHeight(~0u), HasValidInstrDepths(false), HasValidInstrHeights(false) {} diff --git a/include/llvm/CodeGen/PBQP/CostAllocator.h b/include/llvm/CodeGen/PBQP/CostAllocator.h index 164633453e..ff62c09593 100644 --- a/include/llvm/CodeGen/PBQP/CostAllocator.h +++ b/include/llvm/CodeGen/PBQP/CostAllocator.h @@ -54,7 +54,7 @@ public: entry->incRef(); } PoolRef& operator=(const PoolRef &r) { - assert(entry != 0 && "entry should not be null."); + assert(entry != nullptr && "entry should not be null."); PoolEntry *temp = r.entry; temp->incRef(); entry->decRef(); diff --git a/include/llvm/CodeGen/PBQP/RegAllocSolver.h b/include/llvm/CodeGen/PBQP/RegAllocSolver.h index 79ff6b4ba9..4700a8b623 100644 --- a/include/llvm/CodeGen/PBQP/RegAllocSolver.h +++ b/include/llvm/CodeGen/PBQP/RegAllocSolver.h @@ -86,7 +86,7 @@ namespace PBQP { ConservativelyAllocatable, NotProvablyAllocatable } ReductionState; - NodeMetadata() : RS(Unprocessed), DeniedOpts(0), OptUnsafeEdges(0) {} + NodeMetadata() : RS(Unprocessed), DeniedOpts(0), OptUnsafeEdges(nullptr){} ~NodeMetadata() { delete[] OptUnsafeEdges; } void setup(const Vector& Costs) { diff --git a/include/llvm/CodeGen/Passes.h b/include/llvm/CodeGen/Passes.h index 5d68f8637b..da8e966a12 100644 --- a/include/llvm/CodeGen/Passes.h +++ b/include/llvm/CodeGen/Passes.h @@ -59,7 +59,7 @@ class IdentifyingPassPtr { }; bool IsInstance; public: - IdentifyingPassPtr() : P(0), IsInstance(false) {} + IdentifyingPassPtr() : P(nullptr), IsInstance(false) {} IdentifyingPassPtr(AnalysisID IDPtr) : ID(IDPtr), IsInstance(false) {} IdentifyingPassPtr(Pass *InstancePtr) : P(InstancePtr), IsInstance(true) {} @@ -151,7 +151,7 @@ public: void setStartStopPasses(AnalysisID Start, AnalysisID Stop) { StartAfter = Start; StopAfter = Stop; - Started = (StartAfter == 0); + Started = (StartAfter == nullptr); } void setDisableVerify(bool Disable) { setOpt(DisableVerify, Disable); } @@ -218,14 +218,14 @@ public: /// Return NULL to select the default (generic) machine scheduler. virtual ScheduleDAGInstrs * createMachineScheduler(MachineSchedContext *C) const { - return 0; + return nullptr; } /// Similar to createMachineScheduler but used when postRA machine scheduling /// is enabled. virtual ScheduleDAGInstrs * createPostMachineScheduler(MachineSchedContext *C) const { - return 0; + return nullptr; } protected: @@ -372,7 +372,7 @@ namespace llvm { /// createCodeGenPreparePass - Transform the code to expose more pattern /// matching during instruction selection. - FunctionPass *createCodeGenPreparePass(const TargetMachine *TM = 0); + FunctionPass *createCodeGenPreparePass(const TargetMachine *TM = nullptr); /// MachineLoopInfo - This pass is a loop analysis pass. extern char &MachineLoopInfoID; @@ -547,7 +547,7 @@ namespace llvm { /// createMachineVerifierPass - This pass verifies cenerated machine code /// instructions for correctness. /// - FunctionPass *createMachineVerifierPass(const char *Banner = 0); + FunctionPass *createMachineVerifierPass(const char *Banner = nullptr); /// createDwarfEHPass - This pass mulches exception handling code into a form /// adapted to code generation. Required if using dwarf exception handling. diff --git a/include/llvm/CodeGen/RegAllocPBQP.h b/include/llvm/CodeGen/RegAllocPBQP.h index efd7c6188c..6343bb7c93 100644 --- a/include/llvm/CodeGen/RegAllocPBQP.h +++ b/include/llvm/CodeGen/RegAllocPBQP.h @@ -159,7 +159,7 @@ namespace llvm { FunctionPass * createPBQPRegisterAllocator(std::unique_ptr<PBQPBuilder> &builder, - char *customPassID = 0); + char *customPassID = nullptr); } #endif /* LLVM_CODEGEN_REGALLOCPBQP_H */ diff --git a/include/llvm/CodeGen/RegisterPressure.h b/include/llvm/CodeGen/RegisterPressure.h index a801d1d1ee..c11a6ac261 100644 --- a/include/llvm/CodeGen/RegisterPressure.h +++ b/include/llvm/CodeGen/RegisterPressure.h @@ -158,7 +158,7 @@ class PressureDiffs { unsigned Size; unsigned Max; public: - PressureDiffs(): PDiffArray(0), Size(0), Max(0) {} + PressureDiffs(): PDiffArray(nullptr), Size(0), Max(0) {} ~PressureDiffs() { free(PDiffArray); } void clear() { Size = 0; } @@ -285,12 +285,12 @@ class RegPressureTracker { public: RegPressureTracker(IntervalPressure &rp) : - MF(0), TRI(0), RCI(0), LIS(0), MBB(0), P(rp), RequireIntervals(true), - TrackUntiedDefs(false) {} + MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp), + RequireIntervals(true), TrackUntiedDefs(false) {} RegPressureTracker(RegionPressure &rp) : - MF(0), TRI(0), RCI(0), LIS(0), MBB(0), P(rp), RequireIntervals(false), - TrackUntiedDefs(false) {} + MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp), + RequireIntervals(false), TrackUntiedDefs(false) {} void reset(); @@ -318,7 +318,8 @@ public: SlotIndex getCurrSlot() const; /// Recede across the previous instruction. - bool recede(SmallVectorImpl<unsigned> *LiveUses = 0, PressureDiff *PDiff = 0); + bool recede(SmallVectorImpl<unsigned> *LiveUses = nullptr, + PressureDiff *PDiff = nullptr); /// Advance across the current instruction. bool advance(); @@ -393,7 +394,7 @@ public: MaxPressureLimit); assert(isBottomClosed() && "Uninitialized pressure tracker"); - return getMaxUpwardPressureDelta(MI, 0, Delta, CriticalPSets, + return getMaxUpwardPressureDelta(MI, nullptr, Delta, CriticalPSets, MaxPressureLimit); } diff --git a/include/llvm/CodeGen/RegisterScavenging.h b/include/llvm/CodeGen/RegisterScavenging.h index 28ebe5361b..335dd7f084 100644 --- a/include/llvm/CodeGen/RegisterScavenging.h +++ b/include/llvm/CodeGen/RegisterScavenging.h @@ -42,7 +42,7 @@ class RegScavenger { /// Information on scavenged registers (held in a spill slot). struct ScavengedInfo { - ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(NULL) {} + ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(nullptr) {} /// A spill slot used for scavenging a register post register allocation. int FrameIndex; @@ -73,7 +73,7 @@ class RegScavenger { public: RegScavenger() - : MBB(NULL), NumPhysRegs(0), Tracking(false) {} + : MBB(nullptr), NumPhysRegs(0), Tracking(false) {} /// enterBasicBlock - Start tracking liveness from the begin of the specific /// basic block. @@ -104,7 +104,7 @@ public: /// skipTo - Move the internal MBB iterator but do not update register states. void skipTo(MachineBasicBlock::iterator I) { - if (I == MachineBasicBlock::iterator(NULL)) + if (I == MachineBasicBlock::iterator(nullptr)) Tracking = false; MBBI = I; } diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h index 4886e5c506..5a65d59080 100644 --- a/include/llvm/CodeGen/ScheduleDAG.h +++ b/include/llvm/CodeGen/ScheduleDAG.h @@ -95,7 +95,7 @@ namespace llvm { /// SDep - Construct a null SDep. This is only for use by container /// classes which require default constructors. SUnits may not /// have null SDep edges. - SDep() : Dep(0, Data) {} + SDep() : Dep(nullptr, Data) {} /// SDep - Construct an SDep with the specified values. SDep(SUnit *S, Kind kind, unsigned Reg) @@ -317,46 +317,49 @@ namespace llvm { /// SUnit - Construct an SUnit for pre-regalloc scheduling to represent /// an SDNode and any nodes flagged to it. SUnit(SDNode *node, unsigned nodenum) - : Node(node), Instr(0), OrigNode(0), SchedClass(0), NodeNum(nodenum), - NodeQueueId(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), - NumSuccsLeft(0), WeakPredsLeft(0), WeakSuccsLeft(0), NumRegDefsLeft(0), - Latency(0), isVRegCycle(false), isCall(false), isCallOp(false), - isTwoAddress(false), isCommutable(false), hasPhysRegUses(false), - hasPhysRegDefs(false), hasPhysRegClobbers(false), isPending(false), - isAvailable(false), isScheduled(false), isScheduleHigh(false), - isScheduleLow(false), isCloned(false), isUnbuffered(false), - hasReservedResource(false), SchedulingPref(Sched::None), - isDepthCurrent(false), isHeightCurrent(false), Depth(0), Height(0), - TopReadyCycle(0), BotReadyCycle(0), CopyDstRC(NULL), CopySrcRC(NULL) {} + : Node(node), Instr(nullptr), OrigNode(nullptr), SchedClass(nullptr), + NodeNum(nodenum), NodeQueueId(0), NumPreds(0), NumSuccs(0), + NumPredsLeft(0), NumSuccsLeft(0), WeakPredsLeft(0), WeakSuccsLeft(0), + NumRegDefsLeft(0), Latency(0), isVRegCycle(false), isCall(false), + isCallOp(false), isTwoAddress(false), isCommutable(false), + hasPhysRegUses(false), hasPhysRegDefs(false), hasPhysRegClobbers(false), + isPending(false), isAvailable(false), isScheduled(false), + isScheduleHigh(false), isScheduleLow(false), isCloned(false), + isUnbuffered(false), hasReservedResource(false), + SchedulingPref(Sched::None), isDepthCurrent(false), + isHeightCurrent(false), Depth(0), Height(0), TopReadyCycle(0), + BotReadyCycle(0), CopyDstRC(nullptr), CopySrcRC(nullptr) {} /// SUnit - Construct an SUnit for post-regalloc scheduling to represent /// a MachineInstr. SUnit(MachineInstr *instr, unsigned nodenum) - : Node(0), Instr(instr), OrigNode(0), SchedClass(0), NodeNum(nodenum), - NodeQueueId(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), - NumSuccsLeft(0), WeakPredsLeft(0), WeakSuccsLeft(0), NumRegDefsLeft(0), - Latency(0), isVRegCycle(false), isCall(false), isCallOp(false), - isTwoAddress(false), isCommutable(false), hasPhysRegUses(false), - hasPhysRegDefs(false), hasPhysRegClobbers(false), isPending(false), - isAvailable(false), isScheduled(false), isScheduleHigh(false), - isScheduleLow(false), isCloned(false), isUnbuffered(false), - hasReservedResource(false), SchedulingPref(Sched::None), - isDepthCurrent(false), isHeightCurrent(false), Depth(0), Height(0), - TopReadyCycle(0), BotReadyCycle(0), CopyDstRC(NULL), CopySrcRC(NULL) {} + : Node(nullptr), Instr(instr), OrigNode(nullptr), SchedClass(nullptr), + NodeNum(nodenum), NodeQueueId(0), NumPreds(0), NumSuccs(0), + NumPredsLeft(0), NumSuccsLeft(0), WeakPredsLeft(0), WeakSuccsLeft(0), + NumRegDefsLeft(0), Latency(0), isVRegCycle(false), isCall(false), + isCallOp(false), isTwoAddress(false), isCommutable(false), + hasPhysRegUses(false), hasPhysRegDefs(false), hasPhysRegClobbers(false), + isPending(false), isAvailable(false), isScheduled(false), + isScheduleHigh(false), isScheduleLow(false), isCloned(false), + isUnbuffered(false), hasReservedResource(false), + SchedulingPref(Sched::None), isDepthCurrent(false), + isHeightCurrent(false), Depth(0), Height(0), TopReadyCycle(0), + BotReadyCycle(0), CopyDstRC(nullptr), CopySrcRC(nullptr) {} /// SUnit - Construct a placeholder SUnit. SUnit() - : Node(0), Instr(0), OrigNode(0), SchedClass(0), NodeNum(BoundaryID), - NodeQueueId(0), NumPreds(0), NumSuccs(0), NumPredsLeft(0), - NumSuccsLeft(0), WeakPredsLeft(0), WeakSuccsLeft(0), NumRegDefsLeft(0), - Latency(0), isVRegCycle(false), isCall(false), isCallOp(false), - isTwoAddress(false), isCommutable(false), hasPhysRegUses(false), - hasPhysRegDefs(false), hasPhysRegClobbers(false), isPending(false), - isAvailable(false), isScheduled(false), isScheduleHigh(false), - isScheduleLow(false), isCloned(false), isUnbuffered(false), - hasReservedResource(false), SchedulingPref(Sched::None), - isDepthCurrent(false), isHeightCurrent(false), Depth(0), Height(0), - TopReadyCycle(0), BotReadyCycle(0), CopyDstRC(NULL), CopySrcRC(NULL) {} + : Node(nullptr), Instr(nullptr), OrigNode(nullptr), SchedClass(nullptr), + NodeNum(BoundaryID), NodeQueueId(0), NumPreds(0), NumSuccs(0), + NumPredsLeft(0), NumSuccsLeft(0), WeakPredsLeft(0), WeakSuccsLeft(0), + NumRegDefsLeft(0), Latency(0), isVRegCycle(false), isCall(false), + isCallOp(false), isTwoAddress(false), isCommutable(false), + hasPhysRegUses(false), hasPhysRegDefs(false), hasPhysRegClobbers(false), + isPending(false), isAvailable(false), isScheduled(false), + isScheduleHigh(false), isScheduleLow(false), isCloned(false), + isUnbuffered(false), hasReservedResource(false), + SchedulingPref(Sched::None), isDepthCurrent(false), + isHeightCurrent(false), Depth(0), Height(0), TopReadyCycle(0), + BotReadyCycle(0), CopyDstRC(nullptr), CopySrcRC(nullptr) {} /// \brief Boundary nodes are placeholders for the boundary of the /// scheduling region. diff --git a/include/llvm/CodeGen/ScheduleDAGInstrs.h b/include/llvm/CodeGen/ScheduleDAGInstrs.h index 72bbe8b718..e6754a2c03 100644 --- a/include/llvm/CodeGen/ScheduleDAGInstrs.h +++ b/include/llvm/CodeGen/ScheduleDAGInstrs.h @@ -158,7 +158,7 @@ namespace llvm { const MachineDominatorTree &mdt, bool IsPostRAFlag, bool RemoveKillFlags = false, - LiveIntervals *LIS = 0); + LiveIntervals *LIS = nullptr); virtual ~ScheduleDAGInstrs() {} @@ -206,8 +206,9 @@ namespace llvm { /// buildSchedGraph - Build SUnits from the MachineBasicBlock that we are /// input. - void buildSchedGraph(AliasAnalysis *AA, RegPressureTracker *RPTracker = 0, - PressureDiffs *PDiffs = 0); + void buildSchedGraph(AliasAnalysis *AA, + RegPressureTracker *RPTracker = nullptr, + PressureDiffs *PDiffs = nullptr); /// addSchedBarrierDeps - Add dependencies from instructions in the current /// list of instructions being scheduled to scheduling barrier. We want to @@ -259,10 +260,10 @@ namespace llvm { /// newSUnit - Creates a new SUnit and return a ptr to it. inline SUnit *ScheduleDAGInstrs::newSUnit(MachineInstr *MI) { #ifndef NDEBUG - const SUnit *Addr = SUnits.empty() ? 0 : &SUnits[0]; + const SUnit *Addr = SUnits.empty() ? nullptr : &SUnits[0]; #endif SUnits.push_back(SUnit(MI, (unsigned)SUnits.size())); - assert((Addr == 0 || Addr == &SUnits[0]) && + assert((Addr == nullptr || Addr == &SUnits[0]) && "SUnits std::vector reallocated on the fly!"); SUnits.back().OrigNode = &SUnits.back(); return &SUnits.back(); @@ -272,7 +273,7 @@ namespace llvm { inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const { DenseMap<MachineInstr*, SUnit*>::const_iterator I = MISUnitMap.find(MI); if (I == MISUnitMap.end()) - return 0; + return nullptr; return I->second; } } // namespace llvm diff --git a/include/llvm/CodeGen/ScoreboardHazardRecognizer.h b/include/llvm/CodeGen/ScoreboardHazardRecognizer.h index fbbbb0c936..ab14c2de32 100644 --- a/include/llvm/CodeGen/ScoreboardHazardRecognizer.h +++ b/include/llvm/CodeGen/ScoreboardHazardRecognizer.h @@ -47,7 +47,7 @@ class ScoreboardHazardRecognizer : public ScheduleHazardRecognizer { // Indices into the Scoreboard that represent the current cycle. size_t Head; public: - Scoreboard():Data(NULL), Depth(0), Head(0) { } + Scoreboard():Data(nullptr), Depth(0), Head(0) { } ~Scoreboard() { delete[] Data; } @@ -62,7 +62,7 @@ class ScoreboardHazardRecognizer : public ScheduleHazardRecognizer { } void reset(size_t d = 1) { - if (Data == NULL) { + if (!Data) { Depth = d; Data = new unsigned[Depth]; } diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index d71a69d619..99ff5cb64c 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -100,7 +100,7 @@ class SDValue { SDNode *Node; // The node defining the value we are using. unsigned ResNo; // Which return value of the node we are using. public: - SDValue() : Node(0), ResNo(0) {} + SDValue() : Node(nullptr), ResNo(0) {} SDValue(SDNode *node, unsigned resno) : Node(node), ResNo(resno) {} /// get the index which selects a specific result in the SDNode @@ -234,7 +234,7 @@ class SDUse { void operator=(const SDUse &U) LLVM_DELETED_FUNCTION; public: - SDUse() : Val(), User(NULL), Prev(NULL), Next(NULL) {} + SDUse() : Val(), User(nullptr), Prev(nullptr), Next(nullptr) {} /// Normally SDUse will just implicitly convert to an SDValue that it holds. operator const SDValue&() const { return Val; } @@ -408,7 +408,7 @@ public: /// use_empty - Return true if there are no uses of this node. /// - bool use_empty() const { return UseList == NULL; } + bool use_empty() const { return UseList == nullptr; } /// hasOneUse - Return true if there is exactly one use of this node. /// @@ -458,7 +458,7 @@ public: SDUse, ptrdiff_t>::pointer pointer; use_iterator(const use_iterator &I) : Op(I.Op) {} - use_iterator() : Op(0) {} + use_iterator() : Op(nullptr) {} bool operator==(const use_iterator &x) const { return Op == x.Op; @@ -468,7 +468,7 @@ public: } /// atEnd - return true if this iterator is at the end of uses list. - bool atEnd() const { return Op == 0; } + bool atEnd() const { return Op == nullptr; } // Iterator traversal: forward iteration only. use_iterator &operator++() { // Preincrement @@ -506,7 +506,7 @@ public: return use_iterator(UseList); } - static use_iterator use_end() { return use_iterator(0); } + static use_iterator use_end() { return use_iterator(nullptr); } inline iterator_range<use_iterator> uses() { return iterator_range<use_iterator>(use_begin(), use_end()); @@ -586,7 +586,7 @@ public: if (getNumOperands() != 0 && getOperand(getNumOperands()-1).getValueType() == MVT::Glue) return getOperand(getNumOperands()-1).getNode(); - return 0; + return nullptr; } // If this is a pseudo op, like copyfromreg, look to see if there is a @@ -611,7 +611,7 @@ public: for (use_iterator UI = use_begin(), UE = use_end(); UI != UE; ++UI) if (UI.getUse().get().getValueType() == MVT::Glue) return *UI; - return 0; + return nullptr; } /// getNumValues - Return the number of values defined/returned by this @@ -644,12 +644,12 @@ public: /// getOperationName - Return the opcode of this operation for printing. /// - std::string getOperationName(const SelectionDAG *G = 0) const; + std::string getOperationName(const SelectionDAG *G = nullptr) const; static const char* getIndexedModeName(ISD::MemIndexedMode AM); void print_types(raw_ostream &OS, const SelectionDAG *G) const; void print_details(raw_ostream &OS, const SelectionDAG *G) const; - void print(raw_ostream &OS, const SelectionDAG *G = 0) const; - void printr(raw_ostream &OS, const SelectionDAG *G = 0) const; + void print(raw_ostream &OS, const SelectionDAG *G = nullptr) const; + void printr(raw_ostream &OS, const SelectionDAG *G = nullptr) const; /// printrFull - Print a SelectionDAG node and all children down to /// the leaves. The given SelectionDAG allows target-specific nodes @@ -657,7 +657,7 @@ public: /// print the whole DAG, including children that appear multiple /// times. /// - void printrFull(raw_ostream &O, const SelectionDAG *G = 0) const; + void printrFull(raw_ostream &O, const SelectionDAG *G = nullptr) const; /// printrWithDepth - Print a SelectionDAG node and children up to /// depth "depth." The given SelectionDAG allows target-specific @@ -665,7 +665,7 @@ public: /// will print children that appear multiple times wherever they are /// used. /// - void printrWithDepth(raw_ostream &O, const SelectionDAG *G = 0, + void printrWithDepth(raw_ostream &O, const SelectionDAG *G = nullptr, unsigned depth = 100) const; @@ -690,14 +690,15 @@ public: /// Unlike dumpr, this will print the whole DAG, including children /// that appear multiple times. /// - void dumprFull(const SelectionDAG *G = 0) const; + void dumprFull(const SelectionDAG *G = nullptr) const; /// dumprWithDepth - printrWithDepth to dbgs(). The given /// SelectionDAG allows target-specific nodes to be printed in /// human-readable form. Unlike dumpr, this will print children /// that appear multiple times wherever they are used. /// - void dumprWithDepth(const SelectionDAG *G = 0, unsigned depth = 100) const; + void dumprWithDepth(const SelectionDAG *G = nullptr, + unsigned depth = 100) const; /// Profile - Gather unique data for the node. /// @@ -717,8 +718,8 @@ protected: const SDValue *Ops, unsigned NumOps) : NodeType(Opc), OperandsNeedDelete(true), HasDebugValue(false), SubclassData(0), NodeId(-1), - OperandList(NumOps ? new SDUse[NumOps] : 0), - ValueList(VTs.VTs), UseList(NULL), + OperandList(NumOps ? new SDUse[NumOps] : nullptr), + ValueList(VTs.VTs), UseList(nullptr), NumOperands(NumOps), NumValues(VTs.NumVTs), debugLoc(dl), IROrder(Order) { for (unsigned i = 0; i != NumOps; ++i) { @@ -732,9 +733,9 @@ protected: /// set later with InitOperands. SDNode(unsigned Opc, unsigned Order, const DebugLoc dl, SDVTList VTs) : NodeType(Opc), OperandsNeedDelete(false), HasDebugValue(false), - SubclassData(0), NodeId(-1), OperandList(0), - ValueList(VTs.VTs), UseList(NULL), NumOperands(0), NumValues(VTs.NumVTs), - debugLoc(dl), IROrder(Order) {} + SubclassData(0), NodeId(-1), OperandList(nullptr), ValueList(VTs.VTs), + UseList(nullptr), NumOperands(0), NumValues(VTs.NumVTs), debugLoc(dl), + IROrder(Order) {} /// InitOperands - Initialize the operands list of this with 1 operand. void InitOperands(SDUse *Ops, const SDValue &Op0) { @@ -819,7 +820,7 @@ private: int IROrder; public: - SDLoc() : Ptr(NULL), IROrder(0) {} + SDLoc() : Ptr(nullptr), IROrder(0) {} SDLoc(const SDNode *N) : Ptr(N), IROrder(-1) { assert(N && "null SDNode"); } @@ -830,14 +831,14 @@ public: assert(Order >= 0 && "bad IROrder"); } unsigned getIROrder() { - if (IROrder >= 0 || Ptr == NULL) { + if (IROrder >= 0 || Ptr == nullptr) { return (unsigned)IROrder; } const SDNode *N = (const SDNode*)(Ptr); return N->getIROrder(); } DebugLoc getDebugLoc() { - if (Ptr == NULL) { + if (!Ptr) { return DebugLoc(); } if (IROrder >= 0) { @@ -1834,7 +1835,7 @@ public: private: friend class SelectionDAG; MachineSDNode(unsigned Opc, unsigned Order, const DebugLoc DL, SDVTList VTs) - : SDNode(Opc, Order, DL, VTs), MemRefs(0), MemRefsEnd(0) {} + : SDNode(Opc, Order, DL, VTs), MemRefs(nullptr), MemRefsEnd(nullptr) {} /// LocalOperands - Operands for this instruction, if they fit here. If /// they don't, this field is unused. diff --git a/include/llvm/CodeGen/SlotIndexes.h b/include/llvm/CodeGen/SlotIndexes.h index 1cc34d57c9..00bb22b91d 100644 --- a/include/llvm/CodeGen/SlotIndexes.h +++ b/include/llvm/CodeGen/SlotIndexes.h @@ -147,11 +147,11 @@ namespace llvm { }; /// Construct an invalid index. - SlotIndex() : lie(0, 0) {} + SlotIndex() : lie(nullptr, 0) {} // Construct a new slot index from the given one, and set the slot. SlotIndex(const SlotIndex &li, Slot s) : lie(li.listEntry(), unsigned(s)) { - assert(lie.getPointer() != 0 && + assert(lie.getPointer() != nullptr && "Attempt to construct index with 0 pointer."); } @@ -421,7 +421,7 @@ namespace llvm { /// Returns the instruction for the given index, or null if the given /// index has no instruction associated with it. MachineInstr* getInstructionFromIndex(SlotIndex index) const { - return index.isValid() ? index.listEntry()->getInstr() : 0; + return index.isValid() ? index.listEntry()->getInstr() : nullptr; } /// Returns the next non-null index, if one exists. @@ -551,14 +551,14 @@ namespace llvm { // Check that we don't cross the boundary into this block. if (itr->first < end) - return 0; + return nullptr; itr = std::prev(itr); if (itr->first <= start) return itr->second; - return 0; + return nullptr; } /// Insert the given machine instruction into the mapping. Returns the @@ -574,7 +574,7 @@ namespace llvm { // affected by debug information. assert(!mi->isDebugValue() && "Cannot number DBG_VALUE instructions."); - assert(mi->getParent() != 0 && "Instr must be added to function."); + assert(mi->getParent() != nullptr && "Instr must be added to function."); // Get the entries where mi should be inserted. IndexList::iterator prevItr, nextItr; @@ -615,7 +615,7 @@ namespace llvm { IndexListEntry *miEntry(mi2iItr->second.listEntry()); assert(miEntry->getInstr() == mi && "Instruction indexes broken."); // FIXME: Eventually we want to actually delete these indexes. - miEntry->setInstr(0); + miEntry->setInstr(nullptr); mi2iMap.erase(mi2iItr); } } @@ -640,15 +640,15 @@ namespace llvm { MachineFunction::iterator nextMBB = std::next(MachineFunction::iterator(mbb)); - IndexListEntry *startEntry = 0; - IndexListEntry *endEntry = 0; + IndexListEntry *startEntry = nullptr; + IndexListEntry *endEntry = nullptr; IndexList::iterator newItr; if (nextMBB == mbb->getParent()->end()) { startEntry = &indexList.back(); - endEntry = createEntry(0, 0); + endEntry = createEntry(nullptr, 0); newItr = indexList.insertAfter(startEntry, endEntry); } else { - startEntry = createEntry(0, 0); + startEntry = createEntry(nullptr, 0); endEntry = getMBBStartIdx(nextMBB).listEntry(); newItr = indexList.insert(endEntry, startEntry); } diff --git a/include/llvm/CodeGen/StackMaps.h b/include/llvm/CodeGen/StackMaps.h index a62ab6edd4..f903a36a3a 100644 --- a/include/llvm/CodeGen/StackMaps.h +++ b/include/llvm/CodeGen/StackMaps.h @@ -140,7 +140,7 @@ private: uint64_t ID; LocationVec Locations; LiveOutVec LiveOuts; - CallsiteInfo() : CSOffsetExpr(0), ID(0) {} + CallsiteInfo() : CSOffsetExpr(nullptr), ID(0) {} CallsiteInfo(const MCExpr *CSOffsetExpr, uint64_t ID, LocationVec &Locations, LiveOutVec &LiveOuts) : CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(Locations), diff --git a/include/llvm/CodeGen/StackProtector.h b/include/llvm/CodeGen/StackProtector.h index 0b8b8c0662..8cef85cb44 100644 --- a/include/llvm/CodeGen/StackProtector.h +++ b/include/llvm/CodeGen/StackProtector.h @@ -105,11 +105,12 @@ private: public: static char ID; // Pass identification, replacement for typeid. - StackProtector() : FunctionPass(ID), TM(0), TLI(0), SSPBufferSize(0) { + StackProtector() + : FunctionPass(ID), TM(nullptr), TLI(nullptr), SSPBufferSize(0) { initializeStackProtectorPass(*PassRegistry::getPassRegistry()); } StackProtector(const TargetMachine *TM) - : FunctionPass(ID), TM(TM), TLI(0), Trip(TM->getTargetTriple()), + : FunctionPass(ID), TM(TM), TLI(nullptr), Trip(TM->getTargetTriple()), SSPBufferSize(8) { initializeStackProtectorPass(*PassRegistry::getPassRegistry()); } diff --git a/include/llvm/CodeGen/TargetSchedule.h b/include/llvm/CodeGen/TargetSchedule.h index 4e178d057b..690b70fad8 100644 --- a/include/llvm/CodeGen/TargetSchedule.h +++ b/include/llvm/CodeGen/TargetSchedule.h @@ -41,7 +41,7 @@ class TargetSchedModel { unsigned MicroOpFactor; // Multiply to normalize microops to resource units. unsigned ResourceLCM; // Resource units per cycle. Latency normalization factor. public: - TargetSchedModel(): STI(0), TII(0) {} + TargetSchedModel(): STI(nullptr), TII(nullptr) {} /// \brief Initialize the machine model for instruction scheduling. /// @@ -75,7 +75,7 @@ public: const InstrItineraryData *getInstrItineraries() const { if (hasInstrItineraries()) return &InstrItins; - return 0; + return nullptr; } /// \brief Identify the processor corresponding to the current subtarget. @@ -86,7 +86,7 @@ public: /// \brief Return the number of issue slots required for this MI. unsigned getNumMicroOps(const MachineInstr *MI, - const MCSchedClassDesc *SC = 0) const; + const MCSchedClassDesc *SC = nullptr) const; /// \brief Get the number of kinds of resources for this target. unsigned getNumProcResourceKinds() const { diff --git a/include/llvm/CodeGen/VirtRegMap.h b/include/llvm/CodeGen/VirtRegMap.h index 89b5a9f668..eceb875576 100644 --- a/include/llvm/CodeGen/VirtRegMap.h +++ b/include/llvm/CodeGen/VirtRegMap.h @@ -177,7 +177,7 @@ namespace llvm { /// the specified stack slot void assignVirt2StackSlot(unsigned virtReg, int frameIndex); - void print(raw_ostream &OS, const Module* M = 0) const override; + void print(raw_ostream &OS, const Module* M = nullptr) const override; void dump() const; }; diff --git a/include/llvm/IR/ValueMap.h b/include/llvm/IR/ValueMap.h index 42da529733..1503aed621 100644 --- a/include/llvm/IR/ValueMap.h +++ b/include/llvm/IR/ValueMap.h @@ -67,7 +67,7 @@ struct ValueMapConfig { /// and onDelete) and not inside other ValueMap methods. NULL means that no /// mutex is necessary. template<typename ExtraDataT> - static sys::Mutex *getMutex(const ExtraDataT &/*Data*/) { return NULL; } + static sys::Mutex *getMutex(const ExtraDataT &/*Data*/) { return nullptr; } }; /// See the file comment. @@ -253,10 +253,10 @@ struct DenseMapInfo<ValueMapCallbackVH<KeyT, ValueT, Config> > { typedef DenseMapInfo<KeyT> PointerInfo; static inline VH getEmptyKey() { - return VH(PointerInfo::getEmptyKey(), NULL); + return VH(PointerInfo::getEmptyKey(), nullptr); } static inline VH getTombstoneKey() { - return VH(PointerInfo::getTombstoneKey(), NULL); + return VH(PointerInfo::getTombstoneKey(), nullptr); } static unsigned getHashValue(const VH &Val) { return PointerInfo::getHashValue(Val.Unwrap()); diff --git a/include/llvm/PassAnalysisSupport.h b/include/llvm/PassAnalysisSupport.h index 479ee14c66..9164305418 100644 --- a/include/llvm/PassAnalysisSupport.h +++ b/include/llvm/PassAnalysisSupport.h @@ -182,7 +182,7 @@ AnalysisType *Pass::getAnalysisIfAvailable() const { const void *PI = &AnalysisType::ID; Pass *ResultPass = Resolver->getAnalysisIfAvailable(PI, true); - if (!ResultPass) return 0; + if (!ResultPass) return nullptr; // Because the AnalysisType may not be a subclass of pass (for // AnalysisGroups), we use getAdjustedAnalysisPointer here to potentially diff --git a/include/llvm/Support/ArrayRecycler.h b/include/llvm/Support/ArrayRecycler.h index e97433222b..36f644af28 100644 --- a/include/llvm/Support/ArrayRecycler.h +++ b/include/llvm/Support/ArrayRecycler.h @@ -44,10 +44,10 @@ class ArrayRecycler { // Return NULL if no entries are available. T *pop(unsigned Idx) { if (Idx >= Bucket.size()) - return 0; + return nullptr; FreeList *Entry = Bucket[Idx]; if (!Entry) - return 0; + return nullptr; Bucket[Idx] = Entry->Next; return reinterpret_cast<T*>(Entry); } diff --git a/include/llvm/Support/CommandLine.h b/include/llvm/Support/CommandLine.h index ab94d61500..5cb5501397 100644 --- a/include/llvm/Support/CommandLine.h +++ b/include/llvm/Support/CommandLine.h @@ -1063,7 +1063,7 @@ class opt_storage { OptionValue<DataType> Default; void check_location() const { - assert(Location != 0 && "cl::location(...) not specified for a command " + assert(Location && "cl::location(...) not specified for a command " "line option with external storage, " "or cl::init specified before cl::location()!!"); } diff --git a/include/llvm/Support/GenericDomTree.h b/include/llvm/Support/GenericDomTree.h index 3c2d7a826f..5a44077a2c 100644 --- a/include/llvm/Support/GenericDomTree.h +++ b/include/llvm/Support/GenericDomTree.h @@ -489,7 +489,7 @@ public: /// creates a new node as a child of DomBB dominator node,linking it into /// the children list of the immediate dominator. DomTreeNodeBase<NodeT> *addNewBlock(NodeT *BB, NodeT *DomBB) { - assert(getNode(BB) == 0 && "Block already in dominator tree!"); + assert(getNode(BB) == nullptr && "Block already in dominator tree!"); DomTreeNodeBase<NodeT> *IDomNode = getNode(DomBB); assert(IDomNode && "Not immediate dominator specified for block!"); DFSInfoValid = false; @@ -636,7 +636,7 @@ protected: // immediate dominator. NodeT *IDom = getIDom(BB); - assert(IDom || this->DomTreeNodes[NULL]); + assert(IDom || this->DomTreeNodes[nullptr]); DomTreeNodeBase<NodeT> *IDomNode = getNodeForBlock(IDom); // Add a new tree node for this NodeT, and link it as a child of diff --git a/include/llvm/Support/GenericDomTreeConstruction.h b/include/llvm/Support/GenericDomTreeConstruction.h index d997529d62..bcba5e0aeb 100644 --- a/include/llvm/Support/GenericDomTreeConstruction.h +++ b/include/llvm/Support/GenericDomTreeConstruction.h @@ -263,7 +263,7 @@ void Calculate(DominatorTreeBase<typename GraphTraits<NodeT>::NodeType>& DT, typename GraphT::NodeType* ImmDom = DT.getIDom(W); - assert(ImmDom || DT.DomTreeNodes[NULL]); + assert(ImmDom || DT.DomTreeNodes[nullptr]); // Get or calculate the node for the immediate dominator DomTreeNodeBase<typename GraphT::NodeType> *IDomNode = diff --git a/include/llvm/Support/Registry.h b/include/llvm/Support/Registry.h index 073becd586..3da2d7ca7e 100644 --- a/include/llvm/Support/Registry.h +++ b/include/llvm/Support/Registry.h @@ -88,7 +88,7 @@ namespace llvm { const entry& Val; public: - node(const entry& V) : Next(0), Val(V) { + node(const entry& V) : Next(nullptr), Val(V) { if (Tail) Tail->Next = this; else @@ -116,7 +116,7 @@ namespace llvm { }; static iterator begin() { return iterator(Head); } - static iterator end() { return iterator(0); } + static iterator end() { return iterator(nullptr); } /// Abstract base class for registry listeners, which are informed when new diff --git a/include/llvm/Support/Timer.h b/include/llvm/Support/Timer.h index c9c1fd3f41..45c182831b 100644 --- a/include/llvm/Support/Timer.h +++ b/include/llvm/Support/Timer.h @@ -88,10 +88,10 @@ public: explicit Timer(StringRef N) : TG(nullptr) { init(N); } Timer(StringRef N, TimerGroup &tg) : TG(nullptr) { init(N, tg); } Timer(const Timer &RHS) : TG(nullptr) { - assert(RHS.TG == 0 && "Can only copy uninitialized timers"); + assert(!RHS.TG && "Can only copy uninitialized timers"); } const Timer &operator=(const Timer &T) { - assert(TG == 0 && T.TG == 0 && "Can only assign uninit timers"); + assert(!TG && !T.TG && "Can only assign uninit timers"); return *this; } ~Timer(); diff --git a/include/llvm/Target/TargetFrameLowering.h b/include/llvm/Target/TargetFrameLowering.h index a60147f5c0..7c42e23a11 100644 --- a/include/llvm/Target/TargetFrameLowering.h +++ b/include/llvm/Target/TargetFrameLowering.h @@ -105,7 +105,7 @@ public: virtual const SpillSlot * getCalleeSavedSpillSlots(unsigned &NumEntries) const { NumEntries = 0; - return 0; + return nullptr; } /// targetHandlesStackFrameRounding - Returns true if the target is @@ -190,7 +190,7 @@ public: /// before PrologEpilogInserter scans the physical registers used to determine /// what callee saved registers should be spilled. This method is optional. virtual void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, - RegScavenger *RS = NULL) const { + RegScavenger *RS = nullptr) const { } @@ -200,7 +200,7 @@ public: /// replaced with direct constants. This method is optional. /// virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF, - RegScavenger *RS = NULL) const { + RegScavenger *RS = nullptr) const { } /// eliminateCallFramePseudoInstr - This method is called during prolog/epilog diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index d4e14f60f2..165b35fee2 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -66,7 +66,7 @@ public: /// rematerializable, meaning it has no side effects and requires no operands /// that aren't always available. bool isTriviallyReMaterializable(const MachineInstr *MI, - AliasAnalysis *AA = 0) const { + AliasAnalysis *AA = nullptr) const { return MI->getOpcode() == TargetOpcode::IMPLICIT_DEF || (MI->getDesc().isRematerializable() && (isReallyTriviallyReMaterializable(MI, AA) || @@ -230,7 +230,7 @@ public: virtual MachineInstr * convertToThreeAddress(MachineFunction::iterator &MFI, MachineBasicBlock::iterator &MBBI, LiveVariables *LV) const { - return 0; + return nullptr; } /// commuteInstruction - If a target has any instructions that are @@ -257,7 +257,7 @@ public: /// aggressive checks. virtual bool produceSameValue(const MachineInstr *MI0, const MachineInstr *MI1, - const MachineRegisterInfo *MRI = 0) const; + const MachineRegisterInfo *MRI = nullptr) const; /// AnalyzeBranch - Analyze the branching code at the end of MBB, returning /// true if it cannot be understood (e.g. it's a switch dispatch or isn't @@ -555,7 +555,7 @@ protected: MachineInstr* MI, const SmallVectorImpl<unsigned> &Ops, int FrameIndex) const { - return 0; + return nullptr; } /// foldMemoryOperandImpl - Target-dependent implementation for @@ -565,7 +565,7 @@ protected: MachineInstr* MI, const SmallVectorImpl<unsigned> &Ops, MachineInstr* LoadMI) const { - return 0; + return nullptr; } public: @@ -597,7 +597,7 @@ public: /// value. virtual unsigned getOpcodeAfterMemoryUnfold(unsigned Opc, bool UnfoldLoad, bool UnfoldStore, - unsigned *LoadRegIndex = 0) const { + unsigned *LoadRegIndex = nullptr) const { return 0; } @@ -780,7 +780,7 @@ public: const MachineRegisterInfo *MRI, unsigned &FoldAsLoadDefReg, MachineInstr *&DefMI) const { - return 0; + return nullptr; } /// FoldImmediate - 'Reg' is known to be defined by a move immediate @@ -838,7 +838,7 @@ public: /// PredCost. virtual unsigned getInstrLatency(const InstrItineraryData *ItinData, const MachineInstr *MI, - unsigned *PredCost = 0) const; + unsigned *PredCost = nullptr) const; virtual unsigned getPredicationCost(const MachineInstr *MI) const; @@ -1003,7 +1003,7 @@ public: /// Create machine specific model for scheduling. virtual DFAPacketizer* CreateTargetScheduleState(const TargetMachine*, const ScheduleDAG*) const { - return NULL; + return nullptr; } private: diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 30024ec19d..a72994cb70 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -323,7 +323,7 @@ public: bool isTypeLegal(EVT VT) const { assert(!VT.isSimple() || (unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassForVT)); - return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != 0; + return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != nullptr; } class ValueTypeActionImpl { @@ -755,7 +755,7 @@ public: /// alignment error (trap) on the target machine. virtual bool allowsUnalignedMemoryAccesses(EVT, unsigned AddrSpace = 0, - bool * /*Fast*/ = 0) const { + bool * /*Fast*/ = nullptr) const { return false; } @@ -1179,7 +1179,7 @@ public: int64_t BaseOffs; bool HasBaseReg; int64_t Scale; - AddrMode() : BaseGV(0), BaseOffs(0), HasBaseReg(false), Scale(0) {} + AddrMode() : BaseGV(nullptr), BaseOffs(0), HasBaseReg(false), Scale(0) {} }; /// Return true if the addressing mode represented by AM is legal for this @@ -2089,7 +2089,7 @@ public: IsVarArg(isVarArg), IsInReg(isInReg), DoesNotReturn(doesNotReturn), IsReturnValueUsed(isReturnValueUsed), IsTailCall(isTailCall), NumFixedArgs(numFixedArgs), CallConv(callConv), Callee(callee), - Args(args), DAG(dag), DL(dl), CS(NULL) {} + Args(args), DAG(dag), DL(dl), CS(nullptr) {} }; /// This function lowers an abstract call to a function into an actual call. @@ -2173,7 +2173,7 @@ public: /// Returns a 0 terminated array of registers that can be safely used as /// scratch registers. virtual const MCPhysReg *getScratchRegisters(CallingConv::ID CC) const { - return NULL; + return nullptr; } /// This callback is used to prepare for a volatile or atomic load. @@ -2234,7 +2234,7 @@ public: /// target does not support "fast" ISel. virtual FastISel *createFastISel(FunctionLoweringInfo &, const TargetLibraryInfo *) const { - return 0; + return nullptr; } @@ -2308,7 +2308,7 @@ public: AsmOperandInfo(const InlineAsm::ConstraintInfo &info) : InlineAsm::ConstraintInfo(info), ConstraintType(TargetLowering::C_Unknown), - CallOperandVal(0), ConstraintVT(MVT::Other) { + CallOperandVal(nullptr), ConstraintVT(MVT::Other) { } }; @@ -2336,7 +2336,7 @@ public: /// Op, otherwise an empty SDValue can be passed. virtual void ComputeConstraintToUse(AsmOperandInfo &OpInfo, SDValue Op, - SelectionDAG *DAG = 0) const; + SelectionDAG *DAG = nullptr) const; /// Given a constraint, return the type of constraint it is for this target. virtual ConstraintType getConstraintType(const std::string &Constraint) const; diff --git a/include/llvm/Target/TargetLoweringObjectFile.h b/include/llvm/Target/TargetLoweringObjectFile.h index cdb7ea6ca1..2e48513fcc 100644 --- a/include/llvm/Target/TargetLoweringObjectFile.h +++ b/include/llvm/Target/TargetLoweringObjectFile.h @@ -44,7 +44,7 @@ class TargetLoweringObjectFile : public MCObjectFileInfo { public: MCContext &getContext() const { return *Ctx; } - TargetLoweringObjectFile() : MCObjectFileInfo(), Ctx(0), DL(0) {} + TargetLoweringObjectFile() : MCObjectFileInfo(), Ctx(nullptr), DL(nullptr) {} virtual ~TargetLoweringObjectFile(); @@ -104,7 +104,7 @@ public: virtual const MCSection *getSpecialCasedSectionGlobals(const GlobalValue *GV, SectionKind Kind, Mangler &Mang) const { - return 0; + return nullptr; } /// Return an MCExpr to use for a reference to the specified global variable @@ -148,7 +148,7 @@ public: virtual const MCExpr * getExecutableRelativeSymbol(const ConstantExpr *CE, Mangler &Mang, const TargetMachine &TM) const { - return 0; + return nullptr; } /// \brief True if the section is atomized using the symbols in it. diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h index ce3f866cad..8709eb6470 100644 --- a/include/llvm/Target/TargetMachine.h +++ b/include/llvm/Target/TargetMachine.h @@ -102,7 +102,9 @@ public: /// getSubtargetImpl - virtual method implemented by subclasses that returns /// a reference to that target's TargetSubtargetInfo-derived member variable. - virtual const TargetSubtargetInfo *getSubtargetImpl() const { return 0; } + virtual const TargetSubtargetInfo *getSubtargetImpl() const { + return nullptr; + } mutable TargetOptions Options; @@ -118,11 +120,15 @@ public: // // N.B. These objects may change during compilation. It's not safe to cache // them between functions. - virtual const TargetInstrInfo *getInstrInfo() const { return 0; } - virtual const TargetFrameLowering *getFrameLowering() const { return 0; } - virtual const TargetLowering *getTargetLowering() const { return 0; } - virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const{ return 0; } - virtual const DataLayout *getDataLayout() const { return 0; } + virtual const TargetInstrInfo *getInstrInfo() const { return nullptr; } + virtual const TargetFrameLowering *getFrameLowering() const { + return nullptr; + } + virtual const TargetLowering *getTargetLowering() const { return nullptr; } + virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const { + return nullptr; + } + virtual const DataLayout *getDataLayout() const { return nullptr; } /// getMCAsmInfo - Return target specific asm information. /// @@ -139,23 +145,23 @@ public: /// not, return null. This is kept separate from RegInfo until RegInfo has /// details of graph coloring register allocation removed from it. /// - virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; } + virtual const TargetRegisterInfo *getRegisterInfo() const { return nullptr; } /// getIntrinsicInfo - If intrinsic information is available, return it. If /// not, return null. /// - virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; } + virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return nullptr;} /// getJITInfo - If this target supports a JIT, return information for it, /// otherwise return null. /// - virtual TargetJITInfo *getJITInfo() { return 0; } + virtual TargetJITInfo *getJITInfo() { return nullptr; } /// getInstrItineraryData - Returns instruction itinerary data for the target /// or specific subtarget. /// virtual const InstrItineraryData *getInstrItineraryData() const { - return 0; + return nullptr; } bool requiresStructuredCFG() const { return RequireStructuredCFG; } @@ -263,8 +269,8 @@ public: formatted_raw_ostream &, CodeGenFileType, bool /*DisableVerify*/ = true, - AnalysisID /*StartAfter*/ = 0, - AnalysisID /*StopAfter*/ = 0) { + AnalysisID /*StartAfter*/ = nullptr, + AnalysisID /*StopAfter*/ = nullptr) { return true; } @@ -323,8 +329,8 @@ public: /// generation. bool addPassesToEmitFile(PassManagerBase &PM, formatted_raw_ostream &Out, CodeGenFileType FileType, bool DisableVerify = true, - AnalysisID StartAfter = 0, - AnalysisID StopAfter = 0) override; + AnalysisID StartAfter = nullptr, + AnalysisID StopAfter = nullptr) override; /// addPassesToEmitMachineCode - Add passes to the specified pass manager to /// get machine code emitted. This uses a JITCodeEmitter object to handle diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index b0c21c1a9c..a162297afc 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -174,7 +174,7 @@ public: /// isASubClass - return true if this TargetRegisterClass is a subset /// class of at least one other TargetRegisterClass. bool isASubClass() const { - return SuperClasses[0] != 0; + return SuperClasses[0] != nullptr; } /// getRawAllocationOrder - Returns the preferred order for allocating @@ -317,7 +317,7 @@ public: /// indicating if a register is allocatable or not. If a register class is /// specified, returns the subset for the class. BitVector getAllocatableSet(const MachineFunction &MF, - const TargetRegisterClass *RC = NULL) const; + const TargetRegisterClass *RC = nullptr) const; /// getCostPerUse - Return the additional cost of using this register instead /// of other registers in its class. @@ -420,8 +420,8 @@ public: /// order of desired callee-save stack frame offset. The first register is /// closest to the incoming stack pointer if stack grows down, and vice versa. /// - virtual const MCPhysReg* getCalleeSavedRegs(const MachineFunction *MF = 0) - const = 0; + virtual const MCPhysReg* + getCalleeSavedRegs(const MachineFunction *MF = nullptr) const = 0; /// getCallPreservedMask - Return a mask of call-preserved registers for the /// given calling convention on the current sub-target. The mask should @@ -443,7 +443,7 @@ public: /// virtual const uint32_t *getCallPreservedMask(CallingConv::ID) const { // The default mask clobbers everything. All targets should override. - return 0; + return nullptr; } /// getReservedRegs - Returns a bitset indexed by physical register number @@ -651,7 +651,7 @@ public: ArrayRef<MCPhysReg> Order, SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, - const VirtRegMap *VRM = 0) const; + const VirtRegMap *VRM = nullptr) const; /// avoidWriteAfterWrite - Return true if the register allocator should avoid /// writing a register from RC in two consecutive instructions. @@ -805,7 +805,7 @@ public: /// instruction. FIOperandNum is the FI operand number. virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const = 0; + RegScavenger *RS = nullptr) const = 0; //===--------------------------------------------------------------------===// /// Debug information queries. @@ -874,7 +874,7 @@ public: Mask += RCMaskWords; SubReg = *Idx++; if (!SubReg) - Idx = 0; + Idx = nullptr; } }; @@ -902,7 +902,7 @@ class PrintReg { unsigned Reg; unsigned SubIdx; public: - explicit PrintReg(unsigned reg, const TargetRegisterInfo *tri = 0, + explicit PrintReg(unsigned reg, const TargetRegisterInfo *tri = nullptr, unsigned subidx = 0) : TRI(tri), Reg(reg), SubIdx(subidx) {} void print(raw_ostream&) const; diff --git a/include/llvm/Transforms/Scalar.h b/include/llvm/Transforms/Scalar.h index 726722270d..453de03972 100644 --- a/include/llvm/Transforms/Scalar.h +++ b/include/llvm/Transforms/Scalar.h @@ -122,7 +122,7 @@ Pass *createLICMPass(); // Pass *createLoopStrengthReducePass(); -Pass *createGlobalMergePass(const TargetMachine *TM = 0); +Pass *createGlobalMergePass(const TargetMachine *TM = nullptr); //===----------------------------------------------------------------------===// // diff --git a/include/llvm/Transforms/Utils/BasicBlockUtils.h b/include/llvm/Transforms/Utils/BasicBlockUtils.h index 4d5e30592d..2409a80959 100644 --- a/include/llvm/Transforms/Utils/BasicBlockUtils.h +++ b/include/llvm/Transforms/Utils/BasicBlockUtils.h @@ -39,18 +39,18 @@ void DeleteDeadBlock(BasicBlock *BB); /// any single-entry PHI nodes in it, fold them away. This handles the case /// when all entries to the PHI nodes in a block are guaranteed equal, such as /// when the block has exactly one predecessor. -void FoldSingleEntryPHINodes(BasicBlock *BB, Pass *P = 0); +void FoldSingleEntryPHINodes(BasicBlock *BB, Pass *P = nullptr); /// DeleteDeadPHIs - Examine each PHI in the given block and delete it if it /// is dead. Also recursively delete any operands that become dead as /// a result. This includes tracing the def-use list from the PHI to see if /// it is ultimately unused or if it reaches an unused cycle. Return true /// if any PHIs were deleted. -bool DeleteDeadPHIs(BasicBlock *BB, const TargetLibraryInfo *TLI = 0); +bool DeleteDeadPHIs(BasicBlock *BB, const TargetLibraryInfo *TLI = nullptr); /// MergeBlockIntoPredecessor - Attempts to merge a block into its predecessor, /// if possible. The return value indicates success or failure. -bool MergeBlockIntoPredecessor(BasicBlock *BB, Pass *P = 0); +bool MergeBlockIntoPredecessor(BasicBlock *BB, Pass *P = nullptr); // ReplaceInstWithValue - Replace all uses of an instruction (specified by BI) // with a value, then remove and delete the original instruction. @@ -89,12 +89,13 @@ void ReplaceInstWithInst(Instruction *From, Instruction *To); /// to. /// BasicBlock *SplitCriticalEdge(TerminatorInst *TI, unsigned SuccNum, - Pass *P = 0, bool MergeIdenticalEdges = false, + Pass *P = nullptr, + bool MergeIdenticalEdges = false, bool DontDeleteUselessPHIs = false, bool SplitLandingPads = false); inline BasicBlock *SplitCriticalEdge(BasicBlock *BB, succ_iterator SI, - Pass *P = 0) { + Pass *P = nullptr) { return SplitCriticalEdge(BB->getTerminator(), SI.getSuccessorIndex(), P); } @@ -103,7 +104,8 @@ inline BasicBlock *SplitCriticalEdge(BasicBlock *BB, succ_iterator SI, /// This updates all of the same analyses as the other SplitCriticalEdge /// function. If P is specified, it updates the analyses /// described above. -inline bool SplitCriticalEdge(BasicBlock *Succ, pred_iterator PI, Pass *P = 0) { +inline bool SplitCriticalEdge(BasicBlock *Succ, pred_iterator PI, + Pass *P = nullptr) { bool MadeChange = false; TerminatorInst *TI = (*PI)->getTerminator(); for (unsigned i = 0, e = TI->getNumSuccessors(); i != e; ++i) @@ -117,7 +119,7 @@ inline bool SplitCriticalEdge(BasicBlock *Succ, pred_iterator PI, Pass *P = 0) { /// an edge between the two blocks. If P is specified, it updates the analyses /// described above. inline BasicBlock *SplitCriticalEdge(BasicBlock *Src, BasicBlock *Dst, - Pass *P = 0, + Pass *P = nullptr, bool MergeIdenticalEdges = false, bool DontDeleteUselessPHIs = false) { TerminatorInst *TI = Src->getTerminator(); @@ -155,7 +157,7 @@ BasicBlock *SplitBlock(BasicBlock *Old, Instruction *SplitPt, Pass *P); /// is an exit of a loop with other exits). /// BasicBlock *SplitBlockPredecessors(BasicBlock *BB, ArrayRef<BasicBlock*> Preds, - const char *Suffix, Pass *P = 0); + const char *Suffix, Pass *P = nullptr); /// SplitLandingPadPredecessors - This method transforms the landing pad, /// OrigBB, by introducing two new basic blocks into the function. One of those @@ -203,7 +205,7 @@ ReturnInst *FoldReturnIntoUncondBranch(ReturnInst *RI, BasicBlock *BB, /// Returns the NewBasicBlock's terminator. TerminatorInst *SplitBlockAndInsertIfThen(Value *Cond, Instruction *SplitBefore, bool Unreachable, - MDNode *BranchWeights = 0); + MDNode *BranchWeights = nullptr); /// SplitBlockAndInsertIfThenElse is similar to SplitBlockAndInsertIfThen, @@ -223,7 +225,7 @@ TerminatorInst *SplitBlockAndInsertIfThen(Value *Cond, Instruction *SplitBefore, void SplitBlockAndInsertIfThenElse(Value *Cond, Instruction *SplitBefore, TerminatorInst **ThenTerm, TerminatorInst **ElseTerm, - MDNode *BranchWeights = 0); + MDNode *BranchWeights = nullptr); /// /// GetIfCondition - Check whether BB is the merge point of a if-region. diff --git a/include/llvm/Transforms/Utils/Local.h b/include/llvm/Transforms/Utils/Local.h index c68fd06d03..aab2bb2983 100644 --- a/include/llvm/Transforms/Utils/Local.h +++ b/include/llvm/Transforms/Utils/Local.h @@ -55,7 +55,7 @@ template<typename T> class SmallVectorImpl; /// conditions and indirectbr addresses this might make dead if /// DeleteDeadConditions is true. bool ConstantFoldTerminator(BasicBlock *BB, bool DeleteDeadConditions = false, - const TargetLibraryInfo *TLI = 0); + const TargetLibraryInfo *TLI = nullptr); //===----------------------------------------------------------------------===// // Local dead code elimination. @@ -64,21 +64,23 @@ bool ConstantFoldTerminator(BasicBlock *BB, bool DeleteDeadConditions = false, /// isInstructionTriviallyDead - Return true if the result produced by the /// instruction is not used, and the instruction has no side effects. /// -bool isInstructionTriviallyDead(Instruction *I, const TargetLibraryInfo *TLI=0); +bool isInstructionTriviallyDead(Instruction *I, + const TargetLibraryInfo *TLI = nullptr); /// RecursivelyDeleteTriviallyDeadInstructions - If the specified value is a /// trivially dead instruction, delete it. If that makes any of its operands /// trivially dead, delete them too, recursively. Return true if any /// instructions were deleted. bool RecursivelyDeleteTriviallyDeadInstructions(Value *V, - const TargetLibraryInfo *TLI=0); + const TargetLibraryInfo *TLI = nullptr); /// RecursivelyDeleteDeadPHINode - If the specified value is an effectively /// dead PHI node, due to being a def-use chain of single-use nodes that /// either forms a cycle or is terminated by a trivially dead instruction, /// delete it. If that makes any of its operands trivially dead, delete them /// too, recursively. Return true if a change was made. -bool RecursivelyDeleteDeadPHINode(PHINode *PN, const TargetLibraryInfo *TLI=0); +bool RecursivelyDeleteDeadPHINode(PHINode *PN, + const TargetLibraryInfo *TLI = nullptr); /// SimplifyInstructionsInBlock - Scan the specified basic block and try to @@ -86,8 +88,8 @@ bool RecursivelyDeleteDeadPHINode(PHINode *PN, const TargetLibraryInfo *TLI=0); /// /// This returns true if it changed the code, note that it can delete /// instructions in other blocks as well in this block. -bool SimplifyInstructionsInBlock(BasicBlock *BB, const DataLayout *TD = 0, - const TargetLibraryInfo *TLI = 0); +bool SimplifyInstructionsInBlock(BasicBlock *BB, const DataLayout *TD = nullptr, + const TargetLibraryInfo *TLI = nullptr); //===----------------------------------------------------------------------===// // Control Flow Graph Restructuring. @@ -105,7 +107,7 @@ bool SimplifyInstructionsInBlock(BasicBlock *BB, const DataLayout *TD = 0, /// .. and delete the predecessor corresponding to the '1', this will attempt to /// recursively fold the 'and' to 0. void RemovePredecessorAndSimplify(BasicBlock *BB, BasicBlock *Pred, - DataLayout *TD = 0); + DataLayout *TD = nullptr); /// MergeBasicBlockIntoOnlyPred - BB is a block with one predecessor and its @@ -113,7 +115,7 @@ void RemovePredecessorAndSimplify(BasicBlock *BB, BasicBlock *Pred, /// between them, moving the instructions in the predecessor into BB. This /// deletes the predecessor block. /// -void MergeBasicBlockIntoOnlyPred(BasicBlock *BB, Pass *P = 0); +void MergeBasicBlockIntoOnlyPred(BasicBlock *BB, Pass *P = nullptr); /// TryToSimplifyUncondBranchFromEmptyBlock - BB is known to contain an @@ -137,13 +139,13 @@ bool EliminateDuplicatePHINodes(BasicBlock *BB); /// the basic block that was pointed to. /// bool SimplifyCFG(BasicBlock *BB, const TargetTransformInfo &TTI, - const DataLayout *TD = 0); + const DataLayout *TD = nullptr); /// FlatternCFG - This function is used to flatten a CFG. For /// example, it uses parallel-and and parallel-or mode to collapse // if-conditions and merge if-regions with identical statements. /// -bool FlattenCFG(BasicBlock *BB, AliasAnalysis *AA = 0); +bool FlattenCFG(BasicBlock *BB, AliasAnalysis *AA = nullptr); /// FoldBranchToCommonDest - If this basic block is ONLY a setcc and a branch, /// and if a predecessor branches to us and one of our successors, fold the @@ -159,22 +161,23 @@ bool FoldBranchToCommonDest(BranchInst *BI); /// AllocaInst *DemoteRegToStack(Instruction &X, bool VolatileLoads = false, - Instruction *AllocaPoint = 0); + Instruction *AllocaPoint = nullptr); /// DemotePHIToStack - This function takes a virtual register computed by a phi /// node and replaces it with a slot in the stack frame, allocated via alloca. /// The phi node is deleted and it returns the pointer to the alloca inserted. -AllocaInst *DemotePHIToStack(PHINode *P, Instruction *AllocaPoint = 0); +AllocaInst *DemotePHIToStack(PHINode *P, Instruction *AllocaPoint = nullptr); /// getOrEnforceKnownAlignment - If the specified pointer has an alignment that /// we can determine, return it, otherwise return 0. If PrefAlign is specified, /// and it is more than the alignment of the ultimate object, see if we can /// increase the alignment of the ultimate object, making this check succeed. unsigned getOrEnforceKnownAlignment(Value *V, unsigned PrefAlign, - const DataLayout *TD = 0); + const DataLayout *TD = nullptr); /// getKnownAlignment - Try to infer an alignment for the specified pointer. -static inline unsigned getKnownAlignment(Value *V, const DataLayout *TD = 0) { +static inline unsigned getKnownAlignment(Value *V, + const DataLayout *TD = nullptr) { return getOrEnforceKnownAlignment(V, 0, TD); } diff --git a/include/llvm/Transforms/Utils/SSAUpdater.h b/include/llvm/Transforms/Utils/SSAUpdater.h index 0c0e5de584..72ba658241 100644 --- a/include/llvm/Transforms/Utils/SSAUpdater.h +++ b/include/llvm/Transforms/Utils/SSAUpdater.h @@ -56,7 +56,7 @@ private: public: /// If InsertedPHIs is specified, it will be filled /// in with all PHI Nodes created by rewriting. - explicit SSAUpdater(SmallVectorImpl<PHINode*> *InsertedPHIs = 0); + explicit SSAUpdater(SmallVectorImpl<PHINode*> *InsertedPHIs = nullptr); ~SSAUpdater(); /// \brief Reset this object to get ready for a new set of SSA updates with diff --git a/include/llvm/Transforms/Utils/SSAUpdaterImpl.h b/include/llvm/Transforms/Utils/SSAUpdaterImpl.h index 0f3da16508..3cf408aae3 100644 --- a/include/llvm/Transforms/Utils/SSAUpdaterImpl.h +++ b/include/llvm/Transforms/Utils/SSAUpdaterImpl.h @@ -52,8 +52,8 @@ private: PhiT *PHITag; // Marker for existing PHIs that match. BBInfo(BlkT *ThisBB, ValT V) - : BB(ThisBB), AvailableVal(V), DefBB(V ? this : 0), BlkNum(0), IDom(0), - NumPreds(0), Preds(0), PHITag(0) { } + : BB(ThisBB), AvailableVal(V), DefBB(V ? this : nullptr), BlkNum(0), + IDom(nullptr), NumPreds(0), Preds(nullptr), PHITag(nullptr) {} }; typedef DenseMap<BlkT*, ValT> AvailableValsTy; @@ -115,7 +115,7 @@ public: Traits::FindPredecessorBlocks(Info->BB, &Preds); Info->NumPreds = Preds.size(); if (Info->NumPreds == 0) - Info->Preds = 0; + Info->Preds = nullptr; else Info->Preds = static_cast<BBInfo**> (Allocator.Allocate(Info->NumPreds * sizeof(BBInfo*), @@ -148,7 +148,7 @@ public: // Now that we know what blocks are backwards-reachable from the starting // block, do a forward depth-first traversal to assign postorder numbers // to those blocks. - BBInfo *PseudoEntry = new (Allocator) BBInfo(0, 0); + BBInfo *PseudoEntry = new (Allocator) BBInfo(nullptr, 0); unsigned BlkNum = 1; // Initialize the worklist with the roots from the backward traversal. @@ -231,7 +231,7 @@ public: for (typename BlockListTy::reverse_iterator I = BlockList->rbegin(), E = BlockList->rend(); I != E; ++I) { BBInfo *Info = *I; - BBInfo *NewIDom = 0; + BBInfo *NewIDom = nullptr; // Iterate through the block's predecessors. for (unsigned p = 0; p != Info->NumPreds; ++p) { @@ -386,7 +386,7 @@ public: // Match failed: clear all the PHITag values. for (typename BlockListTy::iterator I = BlockList->begin(), E = BlockList->end(); I != E; ++I) - (*I)->PHITag = 0; + (*I)->PHITag = nullptr; } } |