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| author | Andrew Trick <atrick@apple.com> | 2014-02-27 21:37:33 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2014-02-27 21:37:33 +0000 |
| commit | 4c34f71b81c1d4ce6801b8d8fd2ec6a09198d129 (patch) | |
| tree | 06fb0e93ae1e82b52b2d80f9747db28bb045fd47 /include | |
| parent | 594e2aa61eaba17d9836551ca479d987f2d9e059 (diff) | |
| download | llvm-4c34f71b81c1d4ce6801b8d8fd2ec6a09198d129.tar.gz llvm-4c34f71b81c1d4ce6801b8d8fd2ec6a09198d129.tar.bz2 llvm-4c34f71b81c1d4ce6801b8d8fd2ec6a09198d129.tar.xz | |
Provide a target override for the latest regalloc heuristic.
This is a temporary workaround for native arm linux builds:
PR18996: Changing regalloc order breaks "lencod" on native arm linux builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202433 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
| -rw-r--r-- | include/llvm/Target/TargetRegisterInfo.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index 22a2bde9cb..b3dbb9c970 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -683,6 +683,12 @@ public: /// (3) Bottom-up allocation is no longer guaranteed to optimally color. virtual bool reverseLocalAssignment() const { return false; } + /// Allow the target to override register assignment heuristics based on the + /// live range size. If this returns false, then local live ranges are always + /// assigned in order regardless of their size. This is a temporary hook for + /// debugging downstream codegen failures exposed by regalloc. + virtual bool mayOverrideLocalAssignment() const { return true; } + /// requiresRegisterScavenging - returns true if the target requires (and can /// make use of) the register scavenger. virtual bool requiresRegisterScavenging(const MachineFunction &MF) const { |