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authorAlkis Evlogimenos <alkis@evlogimenos.com>2004-01-31 14:37:41 +0000
committerAlkis Evlogimenos <alkis@evlogimenos.com>2004-01-31 14:37:41 +0000
commit4d46e1e521c0df1990ea50f8146d22bd77ea71a6 (patch)
treed75a0f192b82df76ef2b53ec27e173d2500441a8 /include
parent32bdd4ea65f58e3227176b9a5a43013fb13f06a5 (diff)
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Revert last night's changes as they broke some tests. Will remerge parts of the patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11029 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/CodeGen/LiveIntervalAnalysis.h20
-rw-r--r--include/llvm/CodeGen/LiveIntervals.h20
2 files changed, 20 insertions, 20 deletions
diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h
index 59441fb3bb..7cf627b355 100644
--- a/include/llvm/CodeGen/LiveIntervalAnalysis.h
+++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h
@@ -13,8 +13,8 @@
// for register v if there is no instruction with number j' > j such
// that v is live at j' abd there is no instruction with number i' < i
// such that v is live at i'. In this implementation intervals can
-// have holes, i.e. an interval might look like [1,20), [50,65),
-// [1000,1001)
+// have holes, i.e. an interval might look like [1,20], [50,65],
+// [1000,1001]
//
//===----------------------------------------------------------------------===//
@@ -22,7 +22,11 @@
#define LLVM_CODEGEN_LIVEINTERVALS_H
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include <iostream>
#include <list>
+#include <map>
+#include <vector>
namespace llvm {
@@ -109,10 +113,6 @@ namespace llvm {
public:
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
- virtual void releaseMemory();
-
- /// runOnMachineFunction - pass entry point
- virtual bool runOnMachineFunction(MachineFunction&);
Intervals& getIntervals() { return intervals_; }
@@ -134,6 +134,9 @@ namespace llvm {
unsigned rep(unsigned reg);
private:
+ /// runOnMachineFunction - pass entry point
+ bool runOnMachineFunction(MachineFunction&);
+
/// computeIntervals - compute live intervals
void computeIntervals();
@@ -161,10 +164,7 @@ namespace llvm {
bool overlapsAliases(const Interval& lhs, const Interval& rhs) const;
- unsigned getInstructionIndex(MachineInstr* instr) const {
- assert(mi2iMap_.count(instr) && "instruction not assigned a number");
- return mi2iMap_.find(instr)->second;
- }
+ unsigned getInstructionIndex(MachineInstr* instr) const;
void printRegName(unsigned reg) const;
};
diff --git a/include/llvm/CodeGen/LiveIntervals.h b/include/llvm/CodeGen/LiveIntervals.h
index 59441fb3bb..7cf627b355 100644
--- a/include/llvm/CodeGen/LiveIntervals.h
+++ b/include/llvm/CodeGen/LiveIntervals.h
@@ -13,8 +13,8 @@
// for register v if there is no instruction with number j' > j such
// that v is live at j' abd there is no instruction with number i' < i
// such that v is live at i'. In this implementation intervals can
-// have holes, i.e. an interval might look like [1,20), [50,65),
-// [1000,1001)
+// have holes, i.e. an interval might look like [1,20], [50,65],
+// [1000,1001]
//
//===----------------------------------------------------------------------===//
@@ -22,7 +22,11 @@
#define LLVM_CODEGEN_LIVEINTERVALS_H
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include <iostream>
#include <list>
+#include <map>
+#include <vector>
namespace llvm {
@@ -109,10 +113,6 @@ namespace llvm {
public:
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
- virtual void releaseMemory();
-
- /// runOnMachineFunction - pass entry point
- virtual bool runOnMachineFunction(MachineFunction&);
Intervals& getIntervals() { return intervals_; }
@@ -134,6 +134,9 @@ namespace llvm {
unsigned rep(unsigned reg);
private:
+ /// runOnMachineFunction - pass entry point
+ bool runOnMachineFunction(MachineFunction&);
+
/// computeIntervals - compute live intervals
void computeIntervals();
@@ -161,10 +164,7 @@ namespace llvm {
bool overlapsAliases(const Interval& lhs, const Interval& rhs) const;
- unsigned getInstructionIndex(MachineInstr* instr) const {
- assert(mi2iMap_.count(instr) && "instruction not assigned a number");
- return mi2iMap_.find(instr)->second;
- }
+ unsigned getInstructionIndex(MachineInstr* instr) const;
void printRegName(unsigned reg) const;
};