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author | Justin Holewinski <jholewinski@nvidia.com> | 2014-06-27 18:35:33 +0000 |
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committer | Justin Holewinski <jholewinski@nvidia.com> | 2014-06-27 18:35:33 +0000 |
commit | 508c80f11f2f52f549caf86f9f6e07d07cea6006 (patch) | |
tree | 3998153eadbb353cf664b0807dae5ef8c12fbe93 /include | |
parent | 1f75f4a0ee049f65eb833109a0fe4f7466ca4f9a (diff) | |
download | llvm-508c80f11f2f52f549caf86f9f6e07d07cea6006.tar.gz llvm-508c80f11f2f52f549caf86f9f6e07d07cea6006.tar.bz2 llvm-508c80f11f2f52f549caf86f9f6e07d07cea6006.tar.xz |
[NVPTX] Add support for efficient rotate instructions on SM 3.2+
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211934 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r-- | include/llvm/IR/IntrinsicsNVVM.td | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/include/llvm/IR/IntrinsicsNVVM.td b/include/llvm/IR/IntrinsicsNVVM.td index d6f933cfbc..52df102232 100644 --- a/include/llvm/IR/IntrinsicsNVVM.td +++ b/include/llvm/IR/IntrinsicsNVVM.td @@ -1948,6 +1948,25 @@ def int_nvvm_sust_p_3d_v4i32_trap "llvm.nvvm.sust.p.3d.v4i32.trap">, GCCBuiltin<"__nvvm_sust_p_3d_v4i32_trap">; +def int_nvvm_rotate_b32 + : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], + [IntrNoMem], "llvm.nvvm.rotate.b32">, + GCCBuiltin<"__nvvm_rotate_b32">; + +def int_nvvm_rotate_b64 + :Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty], + [IntrNoMem], "llvm.nvvm.rotate.b64">, + GCCBuiltin<"__nvvm_rotate_b64">; + +def int_nvvm_rotate_right_b64 + : Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty], + [IntrNoMem], "llvm.nvvm.rotate.right.b64">, + GCCBuiltin<"__nvvm_rotate_right_b64">; + +def int_nvvm_swap_lo_hi_b64 + : Intrinsic<[llvm_i64_ty], [llvm_i64_ty], + [IntrNoMem], "llvm.nvvm.swap.lo.hi.b64">, + GCCBuiltin<"__nvvm_swap_lo_hi_b64">; // Old PTX back-end intrinsics retained here for backwards-compatibility |