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author | Evan Cheng <evan.cheng@apple.com> | 2011-07-11 03:57:24 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-11 03:57:24 +0000 |
commit | 59ee62d2418df8db499eca1ae17f5900dc2dcbba (patch) | |
tree | 087be0d28a100c6e3fe071c6511469636439d20f /include | |
parent | b5a12dd12fa3cd1026e9058a53089c29fb97f2fd (diff) | |
download | llvm-59ee62d2418df8db499eca1ae17f5900dc2dcbba.tar.gz llvm-59ee62d2418df8db499eca1ae17f5900dc2dcbba.tar.bz2 llvm-59ee62d2418df8db499eca1ae17f5900dc2dcbba.tar.xz |
- Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo
and MCSubtargetInfo.
- Added methods to update subtarget features (used when targets automatically
detect subtarget features or switch modes).
- Teach X86Subtarget to update MCSubtargetInfo features bits since the
MCSubtargetInfo layer can be shared with other modules.
- These fixes .code 16 / .code 32 support since mode switch is updated in
MCSubtargetInfo so MC code emitter can do the right thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134884 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r-- | include/llvm/MC/MCSubtargetInfo.h | 12 | ||||
-rw-r--r-- | include/llvm/Target/TargetRegistry.h | 15 | ||||
-rw-r--r-- | include/llvm/Target/TargetSelect.h | 15 |
3 files changed, 33 insertions, 9 deletions
diff --git a/include/llvm/MC/MCSubtargetInfo.h b/include/llvm/MC/MCSubtargetInfo.h index a9e46371ad..3b53f205cd 100644 --- a/include/llvm/MC/MCSubtargetInfo.h +++ b/include/llvm/MC/MCSubtargetInfo.h @@ -16,6 +16,7 @@ #include "llvm/MC/SubtargetFeature.h" #include "llvm/MC/MCInstrItineraries.h" +#include <string> namespace llvm { @@ -26,6 +27,7 @@ class StringRef; /// MCSubtargetInfo - Generic base class for all target subtargets. /// class MCSubtargetInfo { + std::string TargetTriple; // Target triple const SubtargetFeatureKV *ProcFeatures; // Processor feature list const SubtargetFeatureKV *ProcDesc; // Processor descriptions const SubtargetInfoKV *ProcItins; // Scheduling itineraries @@ -34,18 +36,22 @@ class MCSubtargetInfo { const unsigned *ForwardingPathes; // Forwarding pathes unsigned NumFeatures; // Number of processor features unsigned NumProcs; // Number of processors - uint64_t FeatureBits; // Feature bits for current CPU + FS public: - void InitMCSubtargetInfo(StringRef CPU, StringRef FS, + void InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, const SubtargetFeatureKV *PF, const SubtargetFeatureKV *PD, const SubtargetInfoKV *PI, const InstrStage *IS, const unsigned *OC, const unsigned *FP, unsigned NF, unsigned NP); - /// getFeatureBits - Get the feature bits. + /// getTargetTriple - Return the target triple string. + StringRef getTargetTriple() const { + return TargetTriple; + } + + /// getFeatureBits - Return the feature bits. /// uint64_t getFeatureBits() const { return FeatureBits; diff --git a/include/llvm/Target/TargetRegistry.h b/include/llvm/Target/TargetRegistry.h index 679b612fff..671000554c 100644 --- a/include/llvm/Target/TargetRegistry.h +++ b/include/llvm/Target/TargetRegistry.h @@ -89,8 +89,8 @@ namespace llvm { typedef MCInstPrinter *(*MCInstPrinterCtorTy)(const Target &T, unsigned SyntaxVariant, const MCAsmInfo &MAI); - typedef MCCodeEmitter *(*CodeEmitterCtorTy)(const Target &T, - TargetMachine &TM, + typedef MCCodeEmitter *(*CodeEmitterCtorTy)(const MCInstrInfo &II, + const MCSubtargetInfo &STI, MCContext &Ctx); typedef MCStreamer *(*ObjectStreamerCtorTy)(const Target &T, const std::string &TT, @@ -352,10 +352,12 @@ namespace llvm { /// createCodeEmitter - Create a target specific code emitter. - MCCodeEmitter *createCodeEmitter(TargetMachine &TM, MCContext &Ctx) const { + MCCodeEmitter *createCodeEmitter(const MCInstrInfo &II, + const MCSubtargetInfo &STI, + MCContext &Ctx) const { if (!CodeEmitterCtorFn) return 0; - return CodeEmitterCtorFn(*this, TM, Ctx); + return CodeEmitterCtorFn(II, STI, Ctx); } /// createObjectStreamer - Create a target specific MCStreamer. @@ -971,9 +973,10 @@ namespace llvm { } private: - static MCCodeEmitter *Allocator(const Target &T, TargetMachine &TM, + static MCCodeEmitter *Allocator(const MCInstrInfo &II, + const MCSubtargetInfo &STI, MCContext &Ctx) { - return new CodeEmitterImpl(T, TM, Ctx); + return new CodeEmitterImpl(); } }; diff --git a/include/llvm/Target/TargetSelect.h b/include/llvm/Target/TargetSelect.h index 7b969d0193..99c52ac746 100644 --- a/include/llvm/Target/TargetSelect.h +++ b/include/llvm/Target/TargetSelect.h @@ -27,6 +27,10 @@ extern "C" { #include "llvm/Config/Targets.def" #define LLVM_TARGET(TargetName) \ + void LLVMInitialize##TargetName##MCInstrInfo(); +#include "llvm/Config/Targets.def" + +#define LLVM_TARGET(TargetName) \ void LLVMInitialize##TargetName##MCSubtargetInfo(); #include "llvm/Config/Targets.def" @@ -68,6 +72,17 @@ namespace llvm { #include "llvm/Config/Targets.def" } + /// InitializeAllMCInstrInfos - The main program should call this function + /// if it wants access to all available instruction infos for targets that + /// LLVM is configured to support, to make them available via the + /// TargetRegistry. + /// + /// It is legal for a client to make multiple calls to this function. + inline void InitializeAllMCInstrInfos() { +#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##MCInstrInfo(); +#include "llvm/Config/Targets.def" + } + /// InitializeAllMCSubtargetInfos - The main program should call this function /// if it wants access to all available subtarget infos for targets that LLVM /// is configured to support, to make them available via the TargetRegistry. |