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| author | Bob Wilson <bob.wilson@apple.com> | 2009-08-22 02:28:46 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2009-08-22 02:28:46 +0000 |
| commit | b8b85cfd4d7b8e54e3323e555c3e644b3af46ccb (patch) | |
| tree | 3527eb97e23db15b90f074ce35ff7932fa904da9 /include | |
| parent | 50310f9007d0876a42eb994bf8fc24a264968959 (diff) | |
| download | llvm-b8b85cfd4d7b8e54e3323e555c3e644b3af46ccb.tar.gz llvm-b8b85cfd4d7b8e54e3323e555c3e644b3af46ccb.tar.bz2 llvm-b8b85cfd4d7b8e54e3323e555c3e644b3af46ccb.tar.xz | |
Add new intrinsics for Neon vldN_lane and vstN_lane operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79716 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
| -rw-r--r-- | include/llvm/IntrinsicsARM.td | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/include/llvm/IntrinsicsARM.td b/include/llvm/IntrinsicsARM.td index e9dbb490b4..c408a2f374 100644 --- a/include/llvm/IntrinsicsARM.td +++ b/include/llvm/IntrinsicsARM.td @@ -326,6 +326,23 @@ let TargetPrefix = "arm" in { LLVMMatchType<0>, LLVMMatchType<0>], [llvm_ptr_ty], [IntrReadArgMem]>; + // Vector load N-element structure to one lane. + def int_arm_neon_vld2lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>], + [llvm_ptr_ty, LLVMMatchType<0>, + LLVMMatchType<0>, llvm_i32_ty], + [IntrReadArgMem]>; + def int_arm_neon_vld3lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, + LLVMMatchType<0>], + [llvm_ptr_ty, LLVMMatchType<0>, + LLVMMatchType<0>, LLVMMatchType<0>, + llvm_i32_ty], [IntrReadArgMem]>; + def int_arm_neon_vld4lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, + LLVMMatchType<0>, LLVMMatchType<0>], + [llvm_ptr_ty, LLVMMatchType<0>, + LLVMMatchType<0>, LLVMMatchType<0>, + LLVMMatchType<0>, llvm_i32_ty], + [IntrReadArgMem]>; + // Interleaving vector stores from N-element structures. def int_arm_neon_vst1 : Intrinsic<[llvm_void_ty], [llvm_ptr_ty, llvm_anyvector_ty], @@ -341,4 +358,19 @@ let TargetPrefix = "arm" in { [llvm_ptr_ty, llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrWriteArgMem]>; + + // Vector store N-element structure from one lane. + def int_arm_neon_vst2lane : Intrinsic<[llvm_void_ty], + [llvm_ptr_ty, llvm_anyvector_ty, + LLVMMatchType<0>, llvm_i32_ty], + [IntrWriteArgMem]>; + def int_arm_neon_vst3lane : Intrinsic<[llvm_void_ty], + [llvm_ptr_ty, llvm_anyvector_ty, + LLVMMatchType<0>, LLVMMatchType<0>, + llvm_i32_ty], [IntrWriteArgMem]>; + def int_arm_neon_vst4lane : Intrinsic<[llvm_void_ty], + [llvm_ptr_ty, llvm_anyvector_ty, + LLVMMatchType<0>, LLVMMatchType<0>, + LLVMMatchType<0>, llvm_i32_ty], + [IntrWriteArgMem]>; } |