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authorAndrew Trick <atrick@apple.com>2013-08-30 04:27:29 +0000
committerAndrew Trick <atrick@apple.com>2013-08-30 04:27:29 +0000
commitda6fc15f0fb26ebbe42ab96e0d066bbd5bdbb72e (patch)
tree90204955d891351885977e4682ad1d413a421117 /include
parent4c60b8a78d811a5b16ae45f6957933fb479bab58 (diff)
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mi-sched: improve the generic register pressure comparison.
Only compare pressure within the same set. When multiple sets are affected, we prioritize the most constrained set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189641 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/CodeGen/RegisterPressure.h5
1 files changed, 2 insertions, 3 deletions
diff --git a/include/llvm/CodeGen/RegisterPressure.h b/include/llvm/CodeGen/RegisterPressure.h
index b271f7f3d5..68f2ac2349 100644
--- a/include/llvm/CodeGen/RegisterPressure.h
+++ b/include/llvm/CodeGen/RegisterPressure.h
@@ -112,14 +112,13 @@ public:
assert(isValid() && "invalid PressureChange");
return PSetID - 1;
}
+ // If PSetID is invalid, return UINT16_MAX to give it lowest priority.
+ unsigned getPSetOrMax() const { return (PSetID - 1) & UINT16_MAX; }
int getUnitInc() const { return UnitInc; }
void setUnitInc(int Inc) { UnitInc = Inc; }
- // If PSetID is invalid, convert to INT_MAX to give it lowest priority.
- int getRank() const { return (PSetID - 1) & INT_MAX; }
-
bool operator==(const PressureChange &RHS) const {
return PSetID == RHS.PSetID && UnitInc == RHS.UnitInc;
}