Add v4f16 to supported value types.

This is useful for some ARM intrinsics such as VCVTN which does a <4 x float> <-> <4 x half> conversion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191870 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 37 insertions, 29 deletions

diff --git a/include/llvm/CodeGen/ValueTypes.h b/include/llvm/CodeGen/ValueTypes.h
index 18b324ffe5..2e8f637f52 100644
--- a/include/llvm/CodeGen/ValueTypes.h
+++ b/include/llvm/CodeGen/ValueTypes.h
@@ -95,16 +95,17 @@ namespace llvm {
       LAST_INTEGER_VECTOR_VALUETYPE = v16i64,
 
       v2f16          =  42,   //  2 x f16
-      v8f16          =  43,   //  8 x f16
-      v1f32          =  44,   //  1 x f32
-      v2f32          =  45,   //  2 x f32
-      v4f32          =  46,   //  4 x f32
-      v8f32          =  47,   //  8 x f32
-      v16f32         =  48,   // 16 x f32
-      v1f64          =  49,   //  1 x f64
-      v2f64          =  50,   //  2 x f64
-      v4f64          =  51,   //  4 x f64
-      v8f64          =  52,   //  8 x f64
+      v4f16          =  43,   //  4 x f16
+      v8f16          =  44,   //  8 x f16
+      v1f32          =  45,   //  1 x f32
+      v2f32          =  46,   //  2 x f32
+      v4f32          =  47,   //  4 x f32
+      v8f32          =  48,   //  8 x f32
+      v16f32         =  49,   // 16 x f32
+      v1f64          =  50,   //  1 x f64
+      v2f64          =  51,   //  2 x f64
+      v4f64          =  52,   //  4 x f64
+      v8f64          =  53,   //  8 x f64
 
       FIRST_FP_VECTOR_VALUETYPE = v2f16,
       LAST_FP_VECTOR_VALUETYPE = v8f64,
@@ -112,17 +113,17 @@ namespace llvm {
       FIRST_VECTOR_VALUETYPE = v2i1,
       LAST_VECTOR_VALUETYPE  = v8f64,
 
-      x86mmx         =  53,   // This is an X86 MMX value
+      x86mmx         =  54,   // This is an X86 MMX value
 
-      Glue           =  54,   // This glues nodes together during pre-RA sched
+      Glue           =  55,   // This glues nodes together during pre-RA sched
 
-      isVoid         =  55,   // This has no value
+      isVoid         =  56,   // This has no value
 
-      Untyped        =  56,   // This value takes a register, but has
+      Untyped        =  57,   // This value takes a register, but has
                               // unspecified type.  The register class
                               // will be determined by the opcode.
 
-      LAST_VALUETYPE =  57,   // This always remains at the end of the list.
+      LAST_VALUETYPE =  58,   // This always remains at the end of the list.
 
       // This is the current maximum for LAST_VALUETYPE.
       // MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
@@ -293,6 +294,7 @@ namespace llvm {
       case v8i64:
       case v16i64: return i64;
       case v2f16:
+      case v4f16:
       case v8f16: return f16;
       case v1f32:
       case v2f32:
@@ -334,6 +336,7 @@ namespace llvm {
       case v4i16:
       case v4i32:
       case v4i64:
+      case v4f16:
       case v4f32:
       case v4f64: return 4;
       case v2i1:
@@ -395,6 +398,7 @@ namespace llvm {
       case v4i16:
       case v2i32:
       case v1i64:
+      case v4f16:
       case v2f32:
       case v1f64: return 64;
       case f80 :  return 80;
@@ -538,6 +542,7 @@ namespace llvm {
         break;
       case MVT::f16:
         if (NumElements == 2)  return MVT::v2f16;
+        if (NumElements == 4)  return MVT::v4f16;
         if (NumElements == 8)  return MVT::v8f16;
         break;
       case MVT::f32:
diff --git a/include/llvm/CodeGen/ValueTypes.td b/include/llvm/CodeGen/ValueTypes.td
index 415dbed961..5fc98bf220 100644
--- a/include/llvm/CodeGen/ValueTypes.td
+++ b/include/llvm/CodeGen/ValueTypes.td
@@ -64,22 +64,23 @@ def v8i64  : ValueType<512, 40>;   //  8 x i64 vector value
 def v16i64 : ValueType<1024,41>;   // 16 x i64 vector value
 
 def v2f16  : ValueType<32 , 42>;   //  2 x f16 vector value
-def v8f16  : ValueType<128, 43>;   //  8 x f16 vector value
-def v1f32  : ValueType<32 , 44>;   //  1 x f32 vector value
-def v2f32  : ValueType<64 , 45>;   //  2 x f32 vector value
-def v4f32  : ValueType<128, 46>;   //  4 x f32 vector value
-def v8f32  : ValueType<256, 47>;   //  8 x f32 vector value
-def v16f32 : ValueType<512, 48>;   // 16 x f32 vector value
-def v1f64  : ValueType<64, 49>;    //  1 x f64 vector value
-def v2f64  : ValueType<128, 50>;   //  2 x f64 vector value
-def v4f64  : ValueType<256, 51>;   //  4 x f64 vector value
-def v8f64  : ValueType<512, 52>;   //  8 x f64 vector value
+def v4f16  : ValueType<64 , 43>;   //  4 x f16 vector value
+def v8f16  : ValueType<128, 44>;   //  8 x f16 vector value
+def v1f32  : ValueType<32 , 45>;   //  1 x f32 vector value
+def v2f32  : ValueType<64 , 46>;   //  2 x f32 vector value
+def v4f32  : ValueType<128, 47>;   //  4 x f32 vector value
+def v8f32  : ValueType<256, 48>;   //  8 x f32 vector value
+def v16f32 : ValueType<512, 49>;   // 16 x f32 vector value
+def v1f64  : ValueType<64, 50>;    //  1 x f64 vector value
+def v2f64  : ValueType<128, 51>;   //  2 x f64 vector value
+def v4f64  : ValueType<256, 52>;   //  4 x f64 vector value
+def v8f64  : ValueType<512, 53>;   //  8 x f64 vector value
 
 
-def x86mmx : ValueType<64 , 53>;   // X86 MMX value
-def FlagVT : ValueType<0  , 54>;   // Pre-RA sched glue
-def isVoid : ValueType<0  , 55>;   // Produces no value
-def untyped: ValueType<8  , 56>;   // Produces an untyped value
+def x86mmx : ValueType<64 , 54>;   // X86 MMX value
+def FlagVT : ValueType<0  , 55>;   // Pre-RA sched glue
+def isVoid : ValueType<0  , 56>;   // Produces no value
+def untyped: ValueType<8  , 57>;   // Produces an untyped value
 def MetadataVT: ValueType<0, 250>; // Metadata
 
 // Pseudo valuetype mapped to the current pointer size to any address space.
diff --git a/include/llvm/IR/Intrinsics.td b/include/llvm/IR/Intrinsics.td
index 30cd4be282..57c99d982f 100644
--- a/include/llvm/IR/Intrinsics.td
+++ b/include/llvm/IR/Intrinsics.td
@@ -166,6 +166,8 @@ def llvm_v4i64_ty      : LLVMType<v4i64>;    //  4 x i64
 def llvm_v8i64_ty      : LLVMType<v8i64>;    //  8 x i64
 def llvm_v16i64_ty     : LLVMType<v16i64>;   // 16 x i64
 
+def llvm_v2f16_ty      : LLVMType<v2f16>;    //  2 x half (__fp16)
+def llvm_v4f16_ty      : LLVMType<v4f16>;    //  4 x half (__fp16)
 def llvm_v8f16_ty      : LLVMType<v8f16>;    //  8 x half (__fp16)
 def llvm_v1f32_ty      : LLVMType<v1f32>;    //  1 x float
 def llvm_v2f32_ty      : LLVMType<v2f32>;    //  2 x float