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| author | Weiming Zhao <weimingz@codeaurora.org> | 2012-11-16 21:55:34 +0000 |
|---|---|---|
| committer | Weiming Zhao <weimingz@codeaurora.org> | 2012-11-16 21:55:34 +0000 |
| commit | e56764bad10621ac9dcf9d3541533ff2cb0f88b4 (patch) | |
| tree | 72df90de99cb41cdf8322b12fe5da389f167006a /include | |
| parent | cdf493dd0b74fa8a784bd1ea690351e0f4b608ad (diff) | |
| download | llvm-e56764bad10621ac9dcf9d3541533ff2cb0f88b4.tar.gz llvm-e56764bad10621ac9dcf9d3541533ff2cb0f88b4.tar.bz2 llvm-e56764bad10621ac9dcf9d3541533ff2cb0f88b4.tar.xz | |
Remove hard coded registers in ARM ldrexd and strexd instructions
This patch replaces the hard coded GPR pair [R0, R1] of
Intrinsic:arm_ldrexd and [R2, R3] of Intrinsic:arm_strexd with
even/odd GPRPair reg class.
Similar to the lowering of atomic_64 operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168207 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions