Add new TargetRegisterClass::contains method

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15783 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 8 insertions, 0 deletions

diff --git a/include/llvm/Target/MRegisterInfo.h b/include/llvm/Target/MRegisterInfo.h
index 47b55566cf..a28f2c3189 100644
--- a/include/llvm/Target/MRegisterInfo.h
+++ b/include/llvm/Target/MRegisterInfo.h
@@ -65,6 +65,14 @@ public:
     return RegsBegin[i];
   }
 
+  /// contains - Return true if the specified register is included in this
+  /// register class.
+  bool contains(unsigned Reg) const {
+    for (iterator I = begin(), E = end(); I != E; ++I)
+      if (*I == Reg) return true;
+    return false;
+  }
+
   /// allocation_order_begin/end - These methods define a range of registers
   /// which specify the registers in this class that are valid to register
   /// allocate, and the preferred order to allocate them in.  For example,