diff options
| author | Tom Stellard <thomas.stellard@amd.com> | 2012-12-11 21:25:42 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2012-12-11 21:25:42 +0000 |
| commit | f98f2ce29e6e2996fa58f38979143eceaa818335 (patch) | |
| tree | 86dffe7414e6657874db8ac36e5ddcf7d41b2d9c /include | |
| parent | 57ac1f458a754f30cf500410b438fb260f9b8fe5 (diff) | |
| download | llvm-f98f2ce29e6e2996fa58f38979143eceaa818335.tar.gz llvm-f98f2ce29e6e2996fa58f38979143eceaa818335.tar.bz2 llvm-f98f2ce29e6e2996fa58f38979143eceaa818335.tar.xz | |
Add R600 backend
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
| -rw-r--r-- | include/llvm/Intrinsics.td | 1 | ||||
| -rw-r--r-- | include/llvm/IntrinsicsR600.td | 36 |
2 files changed, 37 insertions, 0 deletions
diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td index d3a548cd4e..d5c01ccbf3 100644 --- a/include/llvm/Intrinsics.td +++ b/include/llvm/Intrinsics.td @@ -472,3 +472,4 @@ include "llvm/IntrinsicsXCore.td" include "llvm/IntrinsicsHexagon.td" include "llvm/IntrinsicsNVVM.td" include "llvm/IntrinsicsMips.td" +include "llvm/IntrinsicsR600.td" diff --git a/include/llvm/IntrinsicsR600.td b/include/llvm/IntrinsicsR600.td new file mode 100644 index 0000000000..ecb5668d8e --- /dev/null +++ b/include/llvm/IntrinsicsR600.td @@ -0,0 +1,36 @@ +//===- IntrinsicsR600.td - Defines R600 intrinsics ---------*- tablegen -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines all of the R600-specific intrinsics. +// +//===----------------------------------------------------------------------===// + +let TargetPrefix = "r600" in { + +class R600ReadPreloadRegisterIntrinsic<string name> + : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>, + GCCBuiltin<name>; + +multiclass R600ReadPreloadRegisterIntrinsic_xyz<string prefix> { + def _x : R600ReadPreloadRegisterIntrinsic<!strconcat(prefix, "_x")>; + def _y : R600ReadPreloadRegisterIntrinsic<!strconcat(prefix, "_y")>; + def _z : R600ReadPreloadRegisterIntrinsic<!strconcat(prefix, "_z")>; +} + +defm int_r600_read_global_size : R600ReadPreloadRegisterIntrinsic_xyz < + "__builtin_r600_read_global_size">; +defm int_r600_read_local_size : R600ReadPreloadRegisterIntrinsic_xyz < + "__builtin_r600_read_local_size">; +defm int_r600_read_ngroups : R600ReadPreloadRegisterIntrinsic_xyz < + "__builtin_r600_read_ngroups">; +defm int_r600_read_tgid : R600ReadPreloadRegisterIntrinsic_xyz < + "__builtin_r600_read_tgid">; +defm int_r600_read_tidig : R600ReadPreloadRegisterIntrinsic_xyz < + "__builtin_r600_read_tidig">; +} // End TargetPrefix = "r600" |