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| author | Tim Northover <tnorthover@apple.com> | 2014-05-24 07:05:42 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-05-24 07:05:42 +0000 |
| commit | 6a04ef99f64c60e8368f23fa7717b74dc83cd6e1 (patch) | |
| tree | 38874c233734a0c9495275444ca87b3f1f99db81 /lib/Analysis/ScalarEvolution.cpp | |
| parent | 1288a3b8e63b7704f7b70ec64fdc3e31d7f09b91 (diff) | |
| download | llvm-6a04ef99f64c60e8368f23fa7717b74dc83cd6e1.tar.gz llvm-6a04ef99f64c60e8368f23fa7717b74dc83cd6e1.tar.bz2 llvm-6a04ef99f64c60e8368f23fa7717b74dc83cd6e1.tar.xz | |
ARM64: extract a 32-bit subreg when selecting an inreg extend
After the load/store refactoring, we were sometimes trying to feed a
GPR64 into a 32-bit register offset operand. This failed in
copyPhysReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209566 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Analysis/ScalarEvolution.cpp')
0 files changed, 0 insertions, 0 deletions