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| author | Tim Northover <tnorthover@apple.com> | 2014-03-11 10:48:52 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-03-11 10:48:52 +0000 |
| commit | ca396e391e13d417605ebed06780d92c88f14a6b (patch) | |
| tree | a984bbd50ef52c0ad3f0fd66b81d1021b072d16c /lib/Bitcode | |
| parent | fb411c8b8ce42689d42b0d8e3a871d81f86a7298 (diff) | |
| download | llvm-ca396e391e13d417605ebed06780d92c88f14a6b.tar.gz llvm-ca396e391e13d417605ebed06780d92c88f14a6b.tar.bz2 llvm-ca396e391e13d417605ebed06780d92c88f14a6b.tar.xz | |
IR: add a second ordering operand to cmpxhg for failure
The syntax for "cmpxchg" should now look something like:
cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic
where the second ordering argument gives the required semantics in the case
that no exchange takes place. It should be no stronger than the first ordering
constraint and cannot be either "release" or "acq_rel" (since no store will
have taken place).
rdar://problem/15996804
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203559 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Bitcode')
| -rw-r--r-- | lib/Bitcode/Reader/BitcodeReader.cpp | 20 | ||||
| -rw-r--r-- | lib/Bitcode/Writer/BitcodeWriter.cpp | 4 |
2 files changed, 18 insertions, 6 deletions
diff --git a/lib/Bitcode/Reader/BitcodeReader.cpp b/lib/Bitcode/Reader/BitcodeReader.cpp index 5e358d9cc5..eb716660eb 100644 --- a/lib/Bitcode/Reader/BitcodeReader.cpp +++ b/lib/Bitcode/Reader/BitcodeReader.cpp @@ -2882,7 +2882,8 @@ error_code BitcodeReader::ParseFunctionBody(Function *F) { break; } case bitc::FUNC_CODE_INST_CMPXCHG: { - // CMPXCHG:[ptrty, ptr, cmp, new, vol, ordering, synchscope] + // CMPXCHG:[ptrty, ptr, cmp, new, vol, successordering, synchscope, + // failureordering] unsigned OpNum = 0; Value *Ptr, *Cmp, *New; if (getValueTypePair(Record, OpNum, NextValueNo, Ptr) || @@ -2890,13 +2891,22 @@ error_code BitcodeReader::ParseFunctionBody(Function *F) { cast<PointerType>(Ptr->getType())->getElementType(), Cmp) || popValue(Record, OpNum, NextValueNo, cast<PointerType>(Ptr->getType())->getElementType(), New) || - OpNum+3 != Record.size()) + (OpNum + 3 != Record.size() && OpNum + 4 != Record.size())) return Error(InvalidRecord); - AtomicOrdering Ordering = GetDecodedOrdering(Record[OpNum+1]); - if (Ordering == NotAtomic || Ordering == Unordered) + AtomicOrdering SuccessOrdering = GetDecodedOrdering(Record[OpNum+1]); + if (SuccessOrdering == NotAtomic || SuccessOrdering == Unordered) return Error(InvalidRecord); SynchronizationScope SynchScope = GetDecodedSynchScope(Record[OpNum+2]); - I = new AtomicCmpXchgInst(Ptr, Cmp, New, Ordering, SynchScope); + + AtomicOrdering FailureOrdering; + if (Record.size() < 7) + FailureOrdering = + AtomicCmpXchgInst::getStrongestFailureOrdering(SuccessOrdering); + else + FailureOrdering = GetDecodedOrdering(Record[OpNum+3]); + + I = new AtomicCmpXchgInst(Ptr, Cmp, New, SuccessOrdering, FailureOrdering, + SynchScope); cast<AtomicCmpXchgInst>(I)->setVolatile(Record[OpNum]); InstructionList.push_back(I); break; diff --git a/lib/Bitcode/Writer/BitcodeWriter.cpp b/lib/Bitcode/Writer/BitcodeWriter.cpp index 8a09507c29..d390eedd36 100644 --- a/lib/Bitcode/Writer/BitcodeWriter.cpp +++ b/lib/Bitcode/Writer/BitcodeWriter.cpp @@ -1441,9 +1441,11 @@ static void WriteInstruction(const Instruction &I, unsigned InstID, pushValue(I.getOperand(2), InstID, Vals, VE); // newval. Vals.push_back(cast<AtomicCmpXchgInst>(I).isVolatile()); Vals.push_back(GetEncodedOrdering( - cast<AtomicCmpXchgInst>(I).getOrdering())); + cast<AtomicCmpXchgInst>(I).getSuccessOrdering())); Vals.push_back(GetEncodedSynchScope( cast<AtomicCmpXchgInst>(I).getSynchScope())); + Vals.push_back(GetEncodedOrdering( + cast<AtomicCmpXchgInst>(I).getFailureOrdering())); break; case Instruction::AtomicRMW: Code = bitc::FUNC_CODE_INST_ATOMICRMW; |