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authorAndrew Trick <atrick@apple.com>2013-12-13 19:04:08 +0000
committerAndrew Trick <atrick@apple.com>2013-12-13 19:04:08 +0000
commita23bd2e761f528e91e2b4d14cc495b7afde3b4f2 (patch)
treed6d5aaf4bc49ea79c712e6c3f70579b43c5312c2 /lib/CodeGen/ExecutionDepsFix.cpp
parent38c9ecda9bf92a3bcea30096aeb170978526b925 (diff)
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Revert "Convert liveness tracking to work on a sub-register level instead of just register units."
This reverts commit r197253. This was a great change, but Juergen should be the commit author. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197262 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/ExecutionDepsFix.cpp')
-rw-r--r--lib/CodeGen/ExecutionDepsFix.cpp18
1 files changed, 10 insertions, 8 deletions
diff --git a/lib/CodeGen/ExecutionDepsFix.cpp b/lib/CodeGen/ExecutionDepsFix.cpp
index 1f933316c5..031f19c135 100644
--- a/lib/CodeGen/ExecutionDepsFix.cpp
+++ b/lib/CodeGen/ExecutionDepsFix.cpp
@@ -23,7 +23,7 @@
#define DEBUG_TYPE "execution-fix"
#include "llvm/CodeGen/Passes.h"
#include "llvm/ADT/PostOrderIterator.h"
-#include "llvm/CodeGen/LivePhysRegs.h"
+#include "llvm/CodeGen/LiveRegUnits.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/Allocator.h"
@@ -141,7 +141,7 @@ class ExeDepsFix : public MachineFunctionPass {
std::vector<std::pair<MachineInstr*, unsigned> > UndefReads;
/// Storage for register unit liveness.
- LivePhysRegs LiveRegSet;
+ LiveRegUnits LiveUnits;
/// Current instruction number.
/// The first instruction in each basic block is 0.
@@ -352,7 +352,7 @@ void ExeDepsFix::enterBasicBlock(MachineBasicBlock *MBB) {
// Set up UndefReads to track undefined register reads.
UndefReads.clear();
- LiveRegSet.clear();
+ LiveUnits.clear();
// Set up LiveRegs to represent registers entering MBB.
if (!LiveRegs)
@@ -547,19 +547,21 @@ void ExeDepsFix::processUndefReads(MachineBasicBlock *MBB) {
return;
// Collect this block's live out register units.
- LiveRegSet.init(TRI);
- LiveRegSet.addLiveOuts(MBB);
-
+ LiveUnits.init(TRI);
+ for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(),
+ SE = MBB->succ_end(); SI != SE; ++SI) {
+ LiveUnits.addLiveIns(*SI, *TRI);
+ }
MachineInstr *UndefMI = UndefReads.back().first;
unsigned OpIdx = UndefReads.back().second;
for (MachineBasicBlock::reverse_iterator I = MBB->rbegin(), E = MBB->rend();
I != E; ++I) {
// Update liveness, including the current instrucion's defs.
- LiveRegSet.stepBackward(*I);
+ LiveUnits.stepBackward(*I, *TRI);
if (UndefMI == &*I) {
- if (!LiveRegSet.contains(UndefMI->getOperand(OpIdx).getReg()))
+ if (!LiveUnits.contains(UndefMI->getOperand(OpIdx).getReg(), *TRI))
TII->breakPartialRegDependency(UndefMI, OpIdx, TRI);
UndefReads.pop_back();