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authorEli Friedman <eli.friedman@gmail.com>2011-05-04 20:48:42 +0000
committerEli Friedman <eli.friedman@gmail.com>2011-05-04 20:48:42 +0000
commit24d4c9911e7707eb0c35872f33c8ca01b3edcd7f (patch)
tree59bb3569a25657a4613a9e31cc4a64618cd03a6b /lib/CodeGen/MachineCSE.cpp
parent49cec1d818d0c7d801e786c458896a60eb424524 (diff)
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Back out r130862; it appears to be breaking bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130867 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineCSE.cpp')
-rw-r--r--lib/CodeGen/MachineCSE.cpp70
1 files changed, 27 insertions, 43 deletions
diff --git a/lib/CodeGen/MachineCSE.cpp b/lib/CodeGen/MachineCSE.cpp
index ff7062da30..f97ccf6579 100644
--- a/lib/CodeGen/MachineCSE.cpp
+++ b/lib/CodeGen/MachineCSE.cpp
@@ -82,8 +82,7 @@ namespace {
MachineBasicBlock::const_iterator E) const ;
bool hasLivePhysRegDefUses(const MachineInstr *MI,
const MachineBasicBlock *MBB,
- SmallSet<unsigned,8> &PhysRefs,
- SmallVector<unsigned,8> &PhysDefs) const;
+ SmallSet<unsigned,8> &PhysRefs) const;
bool PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,
SmallSet<unsigned,8> &PhysRefs) const;
bool isCSECandidate(MachineInstr *MI);
@@ -190,8 +189,7 @@ MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
/// instruction does not uses a physical register.
bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI,
const MachineBasicBlock *MBB,
- SmallSet<unsigned,8> &PhysRefs,
- SmallVector<unsigned,8> &PhysDefs) const{
+ SmallSet<unsigned,8> &PhysRefs) const {
MachineBasicBlock::const_iterator I = MI; I = llvm::next(I);
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i);
@@ -208,7 +206,6 @@ bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI,
if (MO.isDef() &&
(MO.isDead() || isPhysDefTriviallyDead(Reg, I, MBB->end())))
continue;
- PhysDefs.push_back(Reg);
PhysRefs.insert(Reg);
for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias)
PhysRefs.insert(*Alias);
@@ -219,40 +216,35 @@ bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI,
bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,
SmallSet<unsigned,8> &PhysRefs) const {
- // Look backward from MI to find CSMI.
+ // For now conservatively returns false if the common subexpression is
+ // not in the same basic block as the given instruction.
+ MachineBasicBlock *MBB = MI->getParent();
+ if (CSMI->getParent() != MBB)
+ return false;
+ MachineBasicBlock::const_iterator I = CSMI; I = llvm::next(I);
+ MachineBasicBlock::const_iterator E = MI;
unsigned LookAheadLeft = LookAheadLimit;
- MachineBasicBlock::const_reverse_iterator I(MI);
- MachineBasicBlock::const_reverse_iterator E(MI->getParent()->rend());
while (LookAheadLeft) {
- while (LookAheadLeft && I != E) {
- // Skip over dbg_value's.
- while (I != E && I->isDebugValue())
- ++I;
-
- if (&*I == CSMI)
- return true;
+ // Skip over dbg_value's.
+ while (I != E && I->isDebugValue())
+ ++I;
- for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
- const MachineOperand &MO = I->getOperand(i);
- if (!MO.isReg() || !MO.isDef())
- continue;
- unsigned MOReg = MO.getReg();
- if (TargetRegisterInfo::isVirtualRegister(MOReg))
- continue;
- if (PhysRefs.count(MOReg))
- return false;
- }
+ if (I == E)
+ return true;
- --LookAheadLeft;
- ++I;
+ for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
+ const MachineOperand &MO = I->getOperand(i);
+ if (!MO.isReg() || !MO.isDef())
+ continue;
+ unsigned MOReg = MO.getReg();
+ if (TargetRegisterInfo::isVirtualRegister(MOReg))
+ continue;
+ if (PhysRefs.count(MOReg))
+ return false;
}
- // Go back another BB; for now, only go back at most one BB.
- MachineBasicBlock *CSBB = CSMI->getParent();
- MachineBasicBlock *BB = MI->getParent();
- if (!CSBB->isSuccessor(BB) || BB->pred_size() != 1)
- return false;
- I = CSBB->rbegin();
- E = CSBB->rend();
+
+ --LookAheadLeft;
+ ++I;
}
return false;
@@ -403,8 +395,7 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
// used, then it's not safe to replace it with a common subexpression.
// It's also not safe if the instruction uses physical registers.
SmallSet<unsigned,8> PhysRefs;
- SmallVector<unsigned,8> DirectPhysRefs;
- if (FoundCSE && hasLivePhysRegDefUses(MI, MBB, PhysRefs, DirectPhysRefs)) {
+ if (FoundCSE && hasLivePhysRegDefUses(MI, MBB, PhysRefs)) {
FoundCSE = false;
// ... Unless the CS is local and it also defines the physical register
@@ -457,13 +448,6 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
MRI->clearKillFlags(CSEPairs[i].second);
}
MI->eraseFromParent();
- if (!DirectPhysRefs.empty() && CSMI->getParent() != MBB) {
- assert(CSMI->getParent()->isSuccessor(MBB));
- SmallVector<unsigned,8>::iterator PI = DirectPhysRefs.begin(),
- PE = DirectPhysRefs.end();
- for (; PI != PE; ++PI)
- MBB->addLiveIn(*PI);
- }
++NumCSEs;
if (!PhysRefs.empty())
++NumPhysCSEs;