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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-05-21 20:02:01 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-05-21 20:02:01 +0000 |
commit | 18b2c9d3bf5a6633535eaad8388f0353b14cbfb8 (patch) | |
tree | 84fed31e7a52adb57e1a872b53945dd7c5aee898 /lib/CodeGen/MachineInstr.cpp | |
parent | 379fe83dda937658b6b08d3c531f0db6c25b7dd7 (diff) | |
download | llvm-18b2c9d3bf5a6633535eaad8388f0353b14cbfb8.tar.gz llvm-18b2c9d3bf5a6633535eaad8388f0353b14cbfb8.tar.bz2 llvm-18b2c9d3bf5a6633535eaad8388f0353b14cbfb8.tar.xz |
Add MachineInstr::readsWritesVirtualRegister() to determine if an instruction
reads or writes a register.
This takes partial redefines and undef uses into account.
Don't actually use it yet. That caused miscompiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104372 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstr.cpp')
-rw-r--r-- | lib/CodeGen/MachineInstr.cpp | 26 |
1 files changed, 15 insertions, 11 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index 595fddda6f..319059b4bb 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -782,27 +782,31 @@ int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill, return -1; } -/// readsVirtualRegister - Return true if the MachineInstr reads the specified -/// virtual register. Take into account that a partial define is a -/// read-modify-write operation. -bool MachineInstr::readsVirtualRegister(unsigned Reg) const { - bool PartDef = false; // Partial redefine - bool FullDef = false; // Full define +/// readsWritesVirtualRegister - Return a pair of bools (reads, writes) +/// indicating if this instruction reads or writes Reg. This also considers +/// partial defines. +std::pair<bool,bool> +MachineInstr::readsWritesVirtualRegister(unsigned Reg, + SmallVectorImpl<unsigned> *Ops) const { + bool PartDef = false; // Partial redefine. + bool FullDef = false; // Full define. + bool Use = false; for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { const MachineOperand &MO = getOperand(i); if (!MO.isReg() || MO.getReg() != Reg) continue; + if (Ops) + Ops->push_back(i); if (MO.isUse()) - return true; - if (MO.getSubReg()) + Use |= !MO.isUndef(); + else if (MO.getSubReg()) PartDef = true; else FullDef = true; } - // A partial register definition causes a read unless the full register is - // also defined. - return PartDef && !FullDef; + // A partial redefine uses Reg unless there is also a full define. + return std::make_pair(Use || (PartDef && !FullDef), PartDef || FullDef); } /// findRegisterDefOperandIdx() - Returns the operand index that is a def of |