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authorEvan Cheng <evan.cheng@apple.com>2010-10-22 21:49:09 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-10-22 21:49:09 +0000
commitc8f46c45a0bdefdb91593cabc87547cc45f9d89d (patch)
tree4014fd60168b1b13fda621782e54268ac01ab888 /lib/CodeGen/MachineInstr.cpp
parent364f17c47162a657bb0c3516588cdfc5297664f0 (diff)
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Unbreak build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117155 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstr.cpp')
-rw-r--r--lib/CodeGen/MachineInstr.cpp11
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 6f0b9719e1..bc2a545a5f 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -1253,6 +1253,17 @@ bool MachineInstr::allDefsAreDead() const {
return true;
}
+/// copyImplicitOps - Copy implicit register operands from specified
+/// instruction to this instruction.
+void MachineInstr::copyImplicitOps(const MachineInstr *MI) {
+ for (unsigned i = MI->getDesc().getNumOperands(), e = MI->getNumOperands();
+ i != e; ++i) {
+ const MachineOperand &MO = MI->getOperand(i);
+ if (MO.isReg() && MO.isImplicit())
+ addOperand(MO);
+ }
+}
+
void MachineInstr::dump() const {
dbgs() << " " << *this;
}