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authorKarthik Bhat <kv.bhat@samsung.com>2014-06-20 04:32:48 +0000
committerKarthik Bhat <kv.bhat@samsung.com>2014-06-20 04:32:48 +0000
commitd2ce9392dca6349a22c8f3e21e74aa59a82d8900 (patch)
treea7f380fb1cf0ef44fc663c52c8650abbdec0c0aa /lib/CodeGen/MachineModuleInfoImpls.cpp
parentaf08b8b820acc71b02e7e8e4d0de3679c7971773 (diff)
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Add Support to Recognize and Vectorize NON SIMD instructions in SLPVectorizer.
This patch adds support to recognize patterns such as fadd,fsub,fadd,fsub.../add,sub,add,sub... and vectorizes them as vector shuffles if they are profitable. These patterns of vector shuffle can later be converted to instructions such as addsubpd etc on X86. Thanks to Arnold and Hal for the reviews. http://reviews.llvm.org/D4015 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211339 91177308-0d34-0410-b5e6-96231b3b80d8
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