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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-10-17 20:26:33 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-10-17 20:26:33 +0000
commit4b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16 (patch)
tree71ba0dcc3c57228e5533f726fb1aeaafc7b4ad82 /lib/CodeGen/MachineRegisterInfo.cpp
parentb08c1de748e847105af805698a49ad51abd4582e (diff)
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Switch MRI::UsedPhysRegs to a register unit bit vector.
This is a more compact, less redundant representation, and it avoids scanning long lists of aliases for ARM D-registers, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166124 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineRegisterInfo.cpp')
-rw-r--r--lib/CodeGen/MachineRegisterInfo.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/MachineRegisterInfo.cpp b/lib/CodeGen/MachineRegisterInfo.cpp
index ae7c15be15..95d7a7dd68 100644
--- a/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/lib/CodeGen/MachineRegisterInfo.cpp
@@ -21,7 +21,7 @@ MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI)
: TRI(&TRI), IsSSA(true), TracksLiveness(true) {
VRegInfo.reserve(256);
RegAllocHints.reserve(256);
- UsedPhysRegs.resize(TRI.getNumRegs());
+ UsedRegUnits.resize(TRI.getNumRegUnits());
UsedPhysRegMask.resize(TRI.getNumRegs());
// Create the physreg use/def lists.
@@ -32,7 +32,7 @@ MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI)
MachineRegisterInfo::~MachineRegisterInfo() {
#ifndef NDEBUG
clearVirtRegs();
- for (unsigned i = 0, e = UsedPhysRegs.size(); i != e; ++i)
+ for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i)
assert(!PhysRegUseDefLists[i] &&
"PhysRegUseDefLists has entries after all instructions are deleted");
#endif