summaryrefslogtreecommitdiff
path: root/lib/CodeGen/MachineRegisterInfo.cpp
diff options
context:
space:
mode:
authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-03-27 15:13:58 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-03-27 15:13:58 +0000
commitaba6559370c3d453588103fb667ffa3b11b76652 (patch)
treeceba9ebeb8cd5280b28d1b5f28d8a2a25f2c35af /lib/CodeGen/MachineRegisterInfo.cpp
parent9c55f5965ba337469466fafec364b0ea6eca459f (diff)
downloadllvm-aba6559370c3d453588103fb667ffa3b11b76652.tar.gz
llvm-aba6559370c3d453588103fb667ffa3b11b76652.tar.bz2
llvm-aba6559370c3d453588103fb667ffa3b11b76652.tar.xz
Add an MRI::tracksLiveness() flag.
Late optimization passes like branch folding and tail duplication can transform the machine code in a way that makes it expensive to keep the register liveness information up to date. There is a fuzzy line between register allocation and late scheduling where the liveness information degrades. The MRI::tracksLiveness() flag makes the line clear: While true, liveness information is accurate, and can be used for register scavenging. Once the flag is false, liveness information is not accurate, and can only be used as a hint. Late passes generally don't need the liveness information, but they will sometimes use the register scavenger to help update it. The scavenger enforces strict correctness, and we have to spend a lot of code to update register liveness that may never be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153511 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineRegisterInfo.cpp')
-rw-r--r--lib/CodeGen/MachineRegisterInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/MachineRegisterInfo.cpp b/lib/CodeGen/MachineRegisterInfo.cpp
index f140decd96..7ea151713a 100644
--- a/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/lib/CodeGen/MachineRegisterInfo.cpp
@@ -18,7 +18,7 @@
using namespace llvm;
MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI)
- : TRI(&TRI), IsSSA(true) {
+ : TRI(&TRI), IsSSA(true), TracksLiveness(true) {
VRegInfo.reserve(256);
RegAllocHints.reserve(256);
UsedPhysRegs.resize(TRI.getNumRegs());