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author | Owen Anderson <resistor@mac.com> | 2014-03-13 23:12:04 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2014-03-13 23:12:04 +0000 |
commit | bf63022492e54c8abe7c8d8c8448661342294f46 (patch) | |
tree | afd0498b2b0da324ad89111ea83faf705400dec9 /lib/CodeGen/MachineRegisterInfo.cpp | |
parent | d3fc1be4f634df136220ffc6e2ec381ae3f55c31 (diff) | |
download | llvm-bf63022492e54c8abe7c8d8c8448661342294f46.tar.gz llvm-bf63022492e54c8abe7c8d8c8448661342294f46.tar.bz2 llvm-bf63022492e54c8abe7c8d8c8448661342294f46.tar.xz |
Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing
operator* on the by-operand iterators to return a MachineOperand& rather than
a MachineInstr&. At this point they almost behave like normal iterators!
Again, this requires making some existing loops more verbose, but should pave
the way for the big range-based for-loop cleanups in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203865 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineRegisterInfo.cpp')
-rw-r--r-- | lib/CodeGen/MachineRegisterInfo.cpp | 29 |
1 files changed, 15 insertions, 14 deletions
diff --git a/lib/CodeGen/MachineRegisterInfo.cpp b/lib/CodeGen/MachineRegisterInfo.cpp index 3dabcbed7f..094cf84dd3 100644 --- a/lib/CodeGen/MachineRegisterInfo.cpp +++ b/lib/CodeGen/MachineRegisterInfo.cpp @@ -80,8 +80,9 @@ MachineRegisterInfo::recomputeRegClass(unsigned Reg, const TargetMachine &TM) { for (reg_nodbg_iterator I = reg_nodbg_begin(Reg), E = reg_nodbg_end(); I != E; ++I) { // Apply the effect of the given operand to NewRC. - NewRC = I->getRegClassConstraintEffect(I.getOperandNo(), NewRC, TII, - getTargetRegisterInfo()); + MachineInstr *MI = I->getParent(); + NewRC = MI->getRegClassConstraintEffect(I.getOperandNo(), NewRC, TII, + getTargetRegisterInfo()); if (!NewRC || NewRC == OldRC) return false; } @@ -126,7 +127,7 @@ void MachineRegisterInfo::verifyUseList(unsigned Reg) const { #ifndef NDEBUG bool Valid = true; for (reg_iterator I = reg_begin(Reg), E = reg_end(); I != E; ++I) { - MachineOperand *MO = &I.getOperand(); + MachineOperand *MO = &*I; MachineInstr *MI = MO->getParent(); if (!MI) { errs() << PrintReg(Reg, getTargetRegisterInfo()) @@ -287,7 +288,7 @@ void MachineRegisterInfo::replaceRegWith(unsigned FromReg, unsigned ToReg) { // TODO: This could be more efficient by bulk changing the operands. for (reg_iterator I = reg_begin(FromReg), E = reg_end(); I != E; ) { - MachineOperand &O = I.getOperand(); + MachineOperand &O = *I; ++I; O.setReg(ToReg); } @@ -299,8 +300,8 @@ void MachineRegisterInfo::replaceRegWith(unsigned FromReg, unsigned ToReg) { /// form, so there should only be one definition. MachineInstr *MachineRegisterInfo::getVRegDef(unsigned Reg) const { // Since we are in SSA form, we can use the first definition. - def_iterator I = def_begin(Reg); - assert((I.atEnd() || std::next(I) == def_end()) && + def_instr_iterator I = def_instr_begin(Reg); + assert((I.atEnd() || std::next(I) == def_instr_end()) && "getVRegDef assumes a single definition or no definition"); return !I.atEnd() ? &*I : 0; } @@ -310,8 +311,8 @@ MachineInstr *MachineRegisterInfo::getVRegDef(unsigned Reg) const { /// multiple definitions or no definition, return null. MachineInstr *MachineRegisterInfo::getUniqueVRegDef(unsigned Reg) const { if (def_empty(Reg)) return 0; - def_iterator I = def_begin(Reg); - if (std::next(I) != def_end()) + def_instr_iterator I = def_instr_begin(Reg); + if (std::next(I) != def_instr_end()) return 0; return &*I; } @@ -329,7 +330,7 @@ bool MachineRegisterInfo::hasOneNonDBGUse(unsigned RegNo) const { /// preserve conservative kill flag information. void MachineRegisterInfo::clearKillFlags(unsigned Reg) const { for (use_iterator UI = use_begin(Reg), UE = use_end(); UI != UE; ++UI) - UI.getOperand().setIsKill(false); + UI->setIsKill(false); } bool MachineRegisterInfo::isLiveIn(unsigned Reg) const { @@ -392,7 +393,7 @@ MachineRegisterInfo::EmitLiveInCopies(MachineBasicBlock *EntryMBB, #ifndef NDEBUG void MachineRegisterInfo::dumpUses(unsigned Reg) const { for (use_iterator I = use_begin(Reg), E = use_end(); I != E; ++I) - I.getOperand().getParent()->dump(); + I->getParent()->dump(); } #endif @@ -420,11 +421,11 @@ bool MachineRegisterInfo::isConstantPhysReg(unsigned PhysReg, /// deleted during LiveDebugVariables analysis. void MachineRegisterInfo::markUsesInDebugValueAsUndef(unsigned Reg) const { // Mark any DBG_VALUE that uses Reg as undef (but don't delete it.) - MachineRegisterInfo::use_iterator nextI; - for (use_iterator I = use_begin(Reg), E = use_end(); I != E; I = nextI) { + MachineRegisterInfo::use_instr_iterator nextI; + for (use_instr_iterator I = use_instr_begin(Reg), E = use_instr_end(); + I != E; I = nextI) { nextI = std::next(I); // I is invalidated by the setReg - MachineOperand& Use = I.getOperand(); - MachineInstr *UseMI = Use.getParent(); + MachineInstr *UseMI = &*I; if (UseMI->isDebugValue()) UseMI->getOperand(0).setReg(0U); } |