Change this code ot pass register classes into the stack slot spiller/reloader

code.  PrologEpilogInserter hasn't been updated yet though, so targets cannot
use this info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23536 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 4 insertions, 2 deletions

diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp
index 52026e2bc7..1e9704eb3f 100644
--- a/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/lib/CodeGen/PrologEpilogInserter.cpp
@@ -200,7 +200,8 @@ void PEI::saveCallerSavedRegisters(MachineFunction &Fn) {
   MachineBasicBlock::iterator I = MBB->begin();
   for (unsigned i = 0, e = RegsToSave.size(); i != e; ++i) {
     // Insert the spill to the stack frame.
-    RegInfo->storeRegToStackSlot(*MBB, I, RegsToSave[i], StackSlots[i]);
+    RegInfo->storeRegToStackSlot(*MBB, I, RegsToSave[i], StackSlots[i],
+                                 0 /*FIXME*/);
   }
 
   // Add code to restore the callee-save registers in each exiting block.
@@ -225,7 +226,8 @@ void PEI::saveCallerSavedRegisters(MachineFunction &Fn) {
       // Restore all registers immediately before the return and any terminators
       // that preceed it.
       for (unsigned i = 0, e = RegsToSave.size(); i != e; ++i) {
-        RegInfo->loadRegFromStackSlot(*MBB, I, RegsToSave[i], StackSlots[i]);
+        RegInfo->loadRegFromStackSlot(*MBB, I, RegsToSave[i], StackSlots[i],
+                                      0 /*FIXME*/);
         assert(I != MBB->begin() &&
                "loadRegFromStackSlot didn't insert any code!");
         // Insert in reverse order.  loadRegFromStackSlot can insert multiple