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authorEvan Cheng <evan.cheng@apple.com>2007-04-30 18:42:09 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-04-30 18:42:09 +0000
commite47e75b46185aaa4927ea1da94ff8574bcc3458a (patch)
treefd6117f58dd2463a915e463f46446721e4c71093 /lib/CodeGen/README.txt
parentbf996f1d5e441c7504ff155d818190f593d54672 (diff)
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Updates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36594 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/README.txt')
-rw-r--r--lib/CodeGen/README.txt58
1 files changed, 57 insertions, 1 deletions
diff --git a/lib/CodeGen/README.txt b/lib/CodeGen/README.txt
index 8e6b0a5e46..30fc27b015 100644
--- a/lib/CodeGen/README.txt
+++ b/lib/CodeGen/README.txt
@@ -85,4 +85,60 @@ scheduled after any node that reads %reg1039.
//===---------------------------------------------------------------------===//
-Re-Materialize load from frame index.
+Use local info (i.e. register scavenger) to assign it a free register to allow
+reuse:
+ ldr r3, [sp, #+4]
+ add r3, r3, #3
+ ldr r2, [sp, #+8]
+ add r2, r2, #2
+ ldr r1, [sp, #+4] <==
+ add r1, r1, #1
+ ldr r0, [sp, #+4]
+ add r0, r0, #2
+
+//===---------------------------------------------------------------------===//
+
+LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
+effects:
+
+R1 = X + 4
+R2 = X + 7
+R3 = X + 15
+
+loop:
+load [i + R1]
+...
+load [i + R2]
+...
+load [i + R3]
+
+Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
+to implement proper re-materialization to handle this:
+
+R1 = X + 4
+R2 = X + 7
+R3 = X + 15
+
+loop:
+R1 = X + 4 @ re-materialized
+load [i + R1]
+...
+R2 = X + 7 @ re-materialized
+load [i + R2]
+...
+R3 = X + 15 @ re-materialized
+load [i + R3]
+
+Furthermore, with re-association, we can enable sharing:
+
+R1 = X + 4
+R2 = X + 7
+R3 = X + 15
+
+loop:
+T = i + X
+load [T + 4]
+...
+load [T + 7]
+...
+load [T + 15]