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author | Rafael Espindola <rafael.espindola@gmail.com> | 2011-11-22 06:27:18 +0000 |
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committer | Rafael Espindola <rafael.espindola@gmail.com> | 2011-11-22 06:27:18 +0000 |
commit | 254a13282c97469973b4fa8cc0e110ed6160642c (patch) | |
tree | 34776d98c4d2a651d258c26554589144cb2521c1 /lib/CodeGen/RegAllocFast.cpp | |
parent | f7de577a08a705970f0fd8f3c1bb40f7040e4476 (diff) | |
download | llvm-254a13282c97469973b4fa8cc0e110ed6160642c.tar.gz llvm-254a13282c97469973b4fa8cc0e110ed6160642c.tar.bz2 llvm-254a13282c97469973b4fa8cc0e110ed6160642c.tar.xz |
If a register is both an early clobber and part of a tied use, handle the use
before the clobber so that we copy the value if needed.
Fixes pr11415.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145056 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocFast.cpp')
-rw-r--r-- | lib/CodeGen/RegAllocFast.cpp | 23 |
1 files changed, 16 insertions, 7 deletions
diff --git a/lib/CodeGen/RegAllocFast.cpp b/lib/CodeGen/RegAllocFast.cpp index 7ac38598c3..4664a3c429 100644 --- a/lib/CodeGen/RegAllocFast.cpp +++ b/lib/CodeGen/RegAllocFast.cpp @@ -682,7 +682,7 @@ void RAFast::handleThroughOperands(MachineInstr *MI, } SmallVector<unsigned, 8> PartialDefs; - DEBUG(dbgs() << "Allocating tied uses and early clobbers.\n"); + DEBUG(dbgs() << "Allocating tied uses.\n"); for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand &MO = MI->getOperand(i); if (!MO.isReg()) continue; @@ -704,15 +704,24 @@ void RAFast::handleThroughOperands(MachineInstr *MI, // That would confuse the later phys-def processing pass. LiveRegMap::iterator LRI = reloadVirtReg(MI, i, Reg, 0); PartialDefs.push_back(LRI->second.PhysReg); - } else if (MO.isEarlyClobber()) { - // Note: defineVirtReg may invalidate MO. - LiveRegMap::iterator LRI = defineVirtReg(MI, i, Reg, 0); - unsigned PhysReg = LRI->second.PhysReg; - if (setPhysReg(MI, i, PhysReg)) - VirtDead.push_back(Reg); } } + DEBUG(dbgs() << "Allocating early clobbers.\n"); + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand &MO = MI->getOperand(i); + if (!MO.isReg()) continue; + unsigned Reg = MO.getReg(); + if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue; + if (!MO.isEarlyClobber()) + continue; + // Note: defineVirtReg may invalidate MO. + LiveRegMap::iterator LRI = defineVirtReg(MI, i, Reg, 0); + unsigned PhysReg = LRI->second.PhysReg; + if (setPhysReg(MI, i, PhysReg)) + VirtDead.push_back(Reg); + } + // Restore UsedInInstr to a state usable for allocating normal virtual uses. UsedInInstr.reset(); for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { |