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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-05-10 17:37:41 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-05-10 17:37:41 +0000 |
| commit | bdda37d7fbafe6876f248341837423a4100f95a5 (patch) | |
| tree | 19a15ab39a313eee8b388aa6e4e4f1f6ad46d705 /lib/CodeGen/RegAllocGreedy.cpp | |
| parent | 0d450dc65906a30beb56aeb1ee22b45b1cd4596c (diff) | |
| download | llvm-bdda37d7fbafe6876f248341837423a4100f95a5.tar.gz llvm-bdda37d7fbafe6876f248341837423a4100f95a5.tar.bz2 llvm-bdda37d7fbafe6876f248341837423a4100f95a5.tar.xz | |
Fix PR9883. Make sure all caches are invalidated when a live range is repaired.
The previous invalidation missed the alias interference caches.
Also add a stats counter for the number of repaired ranges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131133 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocGreedy.cpp')
| -rw-r--r-- | lib/CodeGen/RegAllocGreedy.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp index e9920b8271..87e08ba199 100644 --- a/lib/CodeGen/RegAllocGreedy.cpp +++ b/lib/CodeGen/RegAllocGreedy.cpp @@ -1325,9 +1325,7 @@ unsigned RAGreedy::trySplit(LiveInterval &VirtReg, AllocationOrder &Order, // an assertion when the coalescer is fixed. if (SA->didRepairRange()) { // VirtReg has changed, so all cached queries are invalid. - Order.rewind(); - while (unsigned PhysReg = Order.next()) - query(VirtReg, PhysReg).clear(); + invalidateVirtRegs(); if (unsigned PhysReg = tryAssign(VirtReg, Order, NewVRegs)) return PhysReg; } |