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authorAlkis Evlogimenos <alkis@evlogimenos.com>2003-12-05 11:31:39 +0000
committerAlkis Evlogimenos <alkis@evlogimenos.com>2003-12-05 11:31:39 +0000
commita327e7fea987769152e06c10e58fea81ca2bc556 (patch)
tree1d9e02c6493c86cef46696cfe5ffb335cd8a46c0 /lib/CodeGen/RegAllocLocal.cpp
parent49787e35c3eebb7afce81829d426114451f8a597 (diff)
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Make assertion stricter. Since the source operands are allocated at
this point, the second operand must be a physical register (it cannot be a virtual one). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10292 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocLocal.cpp')
-rw-r--r--lib/CodeGen/RegAllocLocal.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 080e6c69c0..d1a6df09cc 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -583,7 +583,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
// must be same register number as the first operand
// This maps a = b + c into b += c, and saves b into a's spot
- assert(MI->getOperand(1).isRegister() &&
+ assert(MI->getOperand(1).isPhysicalRegister() &&
MI->getOperand(1).getAllocatedRegNum() &&
MI->getOperand(1).opIsUse() &&
"Two address instruction invalid!");