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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-20 20:39:23 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-20 20:39:23 +0000 |
| commit | b66510f309077d9f616462a1696f712236ce5a22 (patch) | |
| tree | 3ab7951adeaf8f9a323e96fa9ed5be081409e453 /lib/CodeGen/RegAllocPBQP.cpp | |
| parent | 3aaa59bcbb226499cd4743a42e919d3bdc24aa42 (diff) | |
| download | llvm-b66510f309077d9f616462a1696f712236ce5a22.tar.gz llvm-b66510f309077d9f616462a1696f712236ce5a22.tar.bz2 llvm-b66510f309077d9f616462a1696f712236ce5a22.tar.xz | |
In MipsDisassembler.cpp, instead of defining register class tables, use the ones
that are generated by TableGen and are already available in
MipsGenRegisterInfo.inc. Suggested by Jakob Stoklund Olesen.
Also, fix bug in function DecodeAFGR64RegisterClass.
Patch by Vladimir Medic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158846 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAllocPBQP.cpp')
0 files changed, 0 insertions, 0 deletions