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authorCraig Topper <craig.topper@gmail.com>2014-04-14 00:51:57 +0000
committerCraig Topper <craig.topper@gmail.com>2014-04-14 00:51:57 +0000
commit4ba844388c586ee40871a52dc9d6eab883fde1b7 (patch)
treee58f9eb46c2ea69c44c2b06a9cae04291ce5ae68 /lib/CodeGen/RegisterClassInfo.cpp
parentb9ed50cf1772205b5a8f3ce2b604d01f9335e360 (diff)
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[C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206142 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegisterClassInfo.cpp')
-rw-r--r--lib/CodeGen/RegisterClassInfo.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/CodeGen/RegisterClassInfo.cpp b/lib/CodeGen/RegisterClassInfo.cpp
index aa84446649..549159e92d 100644
--- a/lib/CodeGen/RegisterClassInfo.cpp
+++ b/lib/CodeGen/RegisterClassInfo.cpp
@@ -29,8 +29,8 @@ static cl::opt<unsigned>
StressRA("stress-regalloc", cl::Hidden, cl::init(0), cl::value_desc("N"),
cl::desc("Limit all regclasses to N registers"));
-RegisterClassInfo::RegisterClassInfo() : Tag(0), MF(0), TRI(0), CalleeSaved(0)
-{}
+RegisterClassInfo::RegisterClassInfo()
+ : Tag(0), MF(nullptr), TRI(nullptr), CalleeSaved(nullptr) {}
void RegisterClassInfo::runOnMachineFunction(const MachineFunction &mf) {
bool Update = false;
@@ -151,7 +151,7 @@ void RegisterClassInfo::compute(const TargetRegisterClass *RC) const {
/// nonoverlapping reserved registers. However, computing the allocation order
/// for all register classes would be too expensive.
unsigned RegisterClassInfo::computePSetLimit(unsigned Idx) const {
- const TargetRegisterClass *RC = 0;
+ const TargetRegisterClass *RC = nullptr;
unsigned NumRCUnits = 0;
for (TargetRegisterInfo::regclass_iterator
RI = TRI->regclass_begin(), RE = TRI->regclass_end(); RI != RE; ++RI) {