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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-06 16:36:30 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-06 16:36:30 +0000
commit7c48913af62ced0da03ba58755cf5f53ad587ba8 (patch)
treec5c8cd4bdc04692195936ff11a0b8cfc4446bc47 /lib/CodeGen/RegisterClassInfo.cpp
parent0b4d96baecf3fe6af0fd45ba815bacf91a017f97 (diff)
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Don't try to be clever, just preserve the target's allocation order.
The order of registers returned by getCalleeSavedRegs is used to lay out the fixed stack slots for CSRs. Some targets like their CSRs used from one end, and some targets want them used from the other end. When computing an allocation order, simply preserve the relative ordering of CSRs that the target specifies in its allocation order. Reordering CSRs would break some targets, ARM in particular. We still place volatiles before the CSRs, providing slightly better results with different calling conventions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132680 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegisterClassInfo.cpp')
-rw-r--r--lib/CodeGen/RegisterClassInfo.cpp17
1 files changed, 6 insertions, 11 deletions
diff --git a/lib/CodeGen/RegisterClassInfo.cpp b/lib/CodeGen/RegisterClassInfo.cpp
index 84e62d2c02..75b0c90be8 100644
--- a/lib/CodeGen/RegisterClassInfo.cpp
+++ b/lib/CodeGen/RegisterClassInfo.cpp
@@ -77,7 +77,7 @@ void RegisterClassInfo::compute(const TargetRegisterClass *RC) const {
RCI.Order.reset(new unsigned[NumRegs]);
unsigned N = 0;
- SmallVector<std::pair<unsigned, unsigned>, 8> CSRAlias;
+ SmallVector<unsigned, 16> CSRAlias;
// FIXME: Once targets reserve registers instead of removing them from the
// allocation order, we can simply use begin/end here.
@@ -89,22 +89,17 @@ void RegisterClassInfo::compute(const TargetRegisterClass *RC) const {
// Remove reserved registers from the allocation order.
if (Reserved.test(PhysReg))
continue;
- if (unsigned CSR = CSRNum[PhysReg])
- // PhysReg aliases a CSR, save it for later. Provide a (CSR, N) sort key
- // to preserve the original ordering of multiple aliases of the same CSR.
- CSRAlias.push_back(std::make_pair((CSR << 16) + (I - AOB), PhysReg));
+ if (CSRNum[PhysReg])
+ // PhysReg aliases a CSR, save it for later.
+ CSRAlias.push_back(PhysReg);
else
RCI.Order[N++] = PhysReg;
}
RCI.NumRegs = N + CSRAlias.size();
assert (RCI.NumRegs <= NumRegs && "Allocation order larger than regclass");
- // Sort CSR aliases acording to the CSR ordering.
- if (CSRAlias.size() >= 2)
- array_pod_sort(CSRAlias.begin(), CSRAlias.end());
-
- for (unsigned i = 0, e = CSRAlias.size(); i != e; ++i)
- RCI.Order[N++] = CSRAlias[i].second;
+ // CSR aliases go after the volatile registers, preserve the target's order.
+ std::copy(CSRAlias.begin(), CSRAlias.end(), &RCI.Order[N]);
DEBUG({
dbgs() << "AllocationOrder(" << RC->getName() << ") = [";