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author | Andrew Trick <atrick@apple.com> | 2013-12-05 17:56:02 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2013-12-05 17:56:02 +0000 |
commit | 6606ef0e98855e9e46404241eedebacb3b424976 (patch) | |
tree | 7149c9a54685986a23983768f8e00e9692c8472f /lib/CodeGen/ScheduleDAGInstrs.cpp | |
parent | 573931394fc307a4606bd0b1854d4df5bf5638a1 (diff) | |
download | llvm-6606ef0e98855e9e46404241eedebacb3b424976.tar.gz llvm-6606ef0e98855e9e46404241eedebacb3b424976.tar.bz2 llvm-6606ef0e98855e9e46404241eedebacb3b424976.tar.xz |
MI-Sched: Model "reserved" processor resources.
This allows a target to use MI-Sched as an in-order scheduler that
will model strict resource conflicts without defining a processor
itinerary. Instead, the target can now use the new per-operand machine
model and define in-order resources with BufferSize=0. For example,
this would allow restricting the type of operations that can be formed
into a dispatch group. (Normally NumMicroOps is sufficient to enforce
dispatch groups).
If the intent is to model latency in in-order pipeline, as opposed to
resource conflicts, then a resource with BufferSize=1 should be
defined instead.
This feature is only casually tested as there are no in-tree targets
using it yet. However, Hal will be experimenting with POWER7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196517 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/ScheduleDAGInstrs.cpp')
-rw-r--r-- | lib/CodeGen/ScheduleDAGInstrs.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp index eeae6ec03d..977b8f0b41 100644 --- a/lib/CodeGen/ScheduleDAGInstrs.cpp +++ b/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -697,9 +697,15 @@ void ScheduleDAGInstrs::initSUnits() { for (TargetSchedModel::ProcResIter PI = SchedModel.getWriteProcResBegin(SC), PE = SchedModel.getWriteProcResEnd(SC); PI != PE; ++PI) { - if (SchedModel.getProcResource(PI->ProcResourceIdx)->BufferSize == 1) { + switch (SchedModel.getProcResource(PI->ProcResourceIdx)->BufferSize) { + case 0: + SU->hasReservedResource = true; + break; + case 1: SU->isUnbuffered = true; break; + default: + break; } } } |