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| author | Alp Toker <alp@nuanti.com> | 2013-12-05 05:44:44 +0000 |
|---|---|---|
| committer | Alp Toker <alp@nuanti.com> | 2013-12-05 05:44:44 +0000 |
| commit | 087ab613f42890b2e84fb8a058f346ead2bfd595 (patch) | |
| tree | 7039d347e786828a5be8897497a4c3f26845b311 /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | 9155b1781508a5f0d3b0c5103dfe966222fe3dc3 (diff) | |
| download | llvm-087ab613f42890b2e84fb8a058f346ead2bfd595.tar.gz llvm-087ab613f42890b2e84fb8a058f346ead2bfd595.tar.bz2 llvm-087ab613f42890b2e84fb8a058f346ead2bfd595.tar.xz | |
Correct word hyphenations
This patch tries to avoid unrelated changes other than fixing a few
hyphen-related ambiguities and contractions in nearby lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196471 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 805cc9e0f2..ff78f646c2 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -8120,7 +8120,7 @@ bool DAGCombiner::SliceUpLoad(SDNode *N) { // The width of the type must be a power of 2 and greater than 8-bits. // Otherwise the load cannot be represented in LLVM IR. - // Moreover, if we shifted with a non 8-bits multiple, the slice + // Moreover, if we shifted with a non-8-bits multiple, the slice // will be accross several bytes. We do not support that. unsigned Width = User->getValueSizeInBits(0); if (Width < 8 || !isPowerOf2_32(Width) || (Shift & 0x7)) @@ -8762,7 +8762,7 @@ bool DAGCombiner::MergeConsecutiveStores(StoreSDNode* St) { } else if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(StoredVal)) { NonZero |= !C->getConstantFPValue()->isNullValue(); } else { - // Non constant. + // Non-constant. break; } |