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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-27 04:08:33 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-27 04:08:33 +0000 |
commit | f792fa90f1125553008659c743cba85b9b5d2e5e (patch) | |
tree | 55af9377e3bfb8833d0c5f862a6a19f7cd5fb39f /lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp | |
parent | 7a2ecd3f99ae4dede7e8c1984c2a08984be69363 (diff) | |
download | llvm-f792fa90f1125553008659c743cba85b9b5d2e5e.tar.gz llvm-f792fa90f1125553008659c743cba85b9b5d2e5e.tar.bz2 llvm-f792fa90f1125553008659c743cba85b9b5d2e5e.tar.xz |
Distinguish early clobber output operands from clobbered registers.
Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we
now use two different asm operand kinds.
The new Kind_Clobber is treated identically to the old
Kind_RegDefEarlyClobber for now, but x87 floating point stack inline
assembly does care about the difference.
This will pop a register off the stack:
asm("fstp %st" : : "t"(x) : "st");
While this will pop the input and push an output:
asm("fst %st" : "=&t"(r) : "t"(x));
We need to know if ST0 was a clobber or an output operand, and we can't
depend on <dead> flags for that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133902 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp index 7b560d173e..6bed1dbc47 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp @@ -490,7 +490,8 @@ bool ScheduleDAGFast::DelayForLiveRegsBottomUp(SUnit *SU, ++i; // Skip the ID value. if (InlineAsm::isRegDefKind(Flags) || - InlineAsm::isRegDefEarlyClobberKind(Flags)) { + InlineAsm::isRegDefEarlyClobberKind(Flags) || + InlineAsm::isClobberKind(Flags)) { // Check for def of register or earlyclobber register. for (; NumVals; --NumVals, ++i) { unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg(); |