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| author | Dale Johannesen <dalej@apple.com> | 2008-09-12 17:49:03 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2008-09-12 17:49:03 +0000 |
| commit | 913d3dfac43f29921467f33aa743f28ee1bfc5d1 (patch) | |
| tree | c8d41ba2614bd1798f9553e689f4489fbc1ee330 /lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp | |
| parent | f5aeb1a8e4cf272c7348376d185ef8d8267653e0 (diff) | |
| download | llvm-913d3dfac43f29921467f33aa743f28ee1bfc5d1.tar.gz llvm-913d3dfac43f29921467f33aa743f28ee1bfc5d1.tar.bz2 llvm-913d3dfac43f29921467f33aa743f28ee1bfc5d1.tar.xz | |
Pass "earlyclobber" bit through to machine
representation; coalescer and RA need to know
about it. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56161 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp index f6a6d7ad6c..51f7a75b6b 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp @@ -4939,8 +4939,10 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { // Add information to the INLINEASM node to know that this register is // set. - OpInfo.AssignedRegs.AddInlineAsmOperands(2 /*REGDEF*/, DAG, - AsmNodeOperands); + OpInfo.AssignedRegs.AddInlineAsmOperands(OpInfo.isEarlyClobber ? + 6 /* EARLYCLOBBER REGDEF */ : + 2 /* REGDEF */ , + DAG, AsmNodeOperands); break; } case InlineAsm::isInput: { @@ -4959,6 +4961,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { unsigned NumOps = cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getZExtValue(); assert(((NumOps & 7) == 2 /*REGDEF*/ || + (NumOps & 7) == 6 /*EARLYCLOBBER REGDEF*/ || (NumOps & 7) == 4 /*MEM*/) && "Skipped past definitions?"); CurOp += (NumOps>>3)+1; @@ -4966,7 +4969,8 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { unsigned NumOps = cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getZExtValue(); - if ((NumOps & 7) == 2 /*REGDEF*/) { + if ((NumOps & 7) == 2 /*REGDEF*/ + || (NumOps & 7) == 6 /* EARLYCLOBBER REGDEF */) { // Add NumOps>>3 registers to MatchedRegs. RegsForValue MatchedRegs; MatchedRegs.TLI = &TLI; |